530SB870M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 530SB870M000DGR

530SB870M000DGR: DescriptionLVDS Output Clock Oscillator, 870MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530SB870M000DGR Overview

LVDS Output Clock Oscillator, 870MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530SB870M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	870 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Bidirectional thyristor controlled three-phase electric heating device circuit

Baiju SHJJ-1 multifunctional food processor circuit diagram

Galanz WP750B computerized microwave oven circuit diagram

Current switching circuit

barcode reading circuit

One of the self-excited switching regulated power supplies

About adjusting the duty cycle of 2812PWM: I want to set the PWM period to 0xfff and the modulation value to the digital value after AD conversion, so that the PWM duty cycle changes with the result of AD, so I used such an assignment statemen...; yxj2046 Microcontroller MCU

Newbie seeking advice: As shown in Figure 1 below, I don't understand why we need to define data pointing to the I/O space? ? [color=rgb(68, 68, 68)][backcolor=transparent][font=Tahoma,]What is the difference between this a...; 菁华如风 DSP and ARM Processors

[Silicon Labs BG22-EK4108A Bluetooth Development Evaluation] 3. PWM breathing light routine and modification: After entering Simplicity Studio V5, plug in the development board, and then go to Project-New-Silicon Labs Project Wizard...Then select Platform Blink PWMWait for IDE to finishDirect profile, the com...; kit7828 Development Kits Review Area

Current reversible chopper circuit: Hello everyone, I have a question about the current reversible chopper circuit. Refer to the video in the link (Lecture 73 of Teacher Fu Qiang on the Basics of Electronic Circuits, Basic Principles of...; zhijianma Power technology

I want to buy an STM32 development board with IoT function, please recommend!: Purpose: Strengthen the practical programming ability of embedded C language. At the same time, you can learn some project experience through learning with development board. Requirements: 1. Have Int...; yhye2world stm32/stm8

EEWORLD University Hall----DDR electrical interface inspection and memory system debugging: DDR electrical interface verification and memory system debugging : https://training.eeworld.com.cn/course/3519...; phantom7 Test/Measurement

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components