LTC2295
Dual 14-Bit, 10Msps
Low Power 3V ADC
FEATURES
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DESCRIPTIO
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Integrated Dual 14-Bit ADCs
Sample Rate: 10Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 120mW
74.4dB SNR
90dB SFDR
110dB Channel Isolation
Multiplexed or Separate Data Bus
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
64-Pin (9mm
×
9mm) QFN Package
The LTC
®
2295 is a 14-bit 10Msps, low power dual 3V
A/D converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2295 is perfect for
demanding imaging and communications applications
with AC performance that includes 74.4dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include
±1.2LSB
INL (typ),
±0.5LSB
DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
+
ANALOG
INPUT A
INPUT
S/H
14-BIT
PIPELINED
ADC CORE
OV
DD
OUTPUT
DRIVERS
D13A
•
•
•
–
D0A
OGND
INL ERROR (LSB)
CLK A
CLOCK/DUTY CYCLE
CONTROL
MUX
CLOCK/DUTY CYCLE
CONTROL
OV
DD
CLK B
+
ANALOG
INPUT B
INPUT
S/H
–
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D13B
•
•
•
D0B
OGND
2295 TA01
U
Typical INL, 2V Range
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
4096
8192
CODE
12288
16384
2295 G02
U
U
2295fa
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LTC2295
ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
64 GND
63 V
DD
62 SENSEA
61 VCMA
60 MODE
59 SHDNA
58 OEA
57 OFA
56 DA13
55 DA12
54 DA11
53 DA10
52 DA9
51 DA8
50 OGND
49 OV
DD
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2295C ............................................... 0°C to 70°C
LTC2295I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
A
INA+
1
A
INA–
2
REFHA 3
REFHA 4
REFLA 5
REFLA 6
V
DD
7
CLKA 8
CLKB 9
V
DD
10
REFLB 11
REFLB 12
REFHB 13
REFHB 14
A
INB–
15
A
INB+
16
65
48 DA7
47 DA6
46 DA5
45 DA4
44 DA3
43 DA2
42 DA1
41 DA0
40 OFB
39 DB13
38 DB12
37 DB11
36 DB10
35 DB9
34 DB8
33 DB7
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
LTC2295CUP
LTC2295IUP
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
●
GND 17
V
DD
18
SENSEB 19
VCMB 20
MUX 21
SHDNB 22
OEB 23
DB0 24
DB1 25
DB2 26
DB3 27
DB4 28
DB5 29
DB6 30
OGND 31
OV
DD
32
QFN PART*
MARKING
LTC2295UP
MIN
●
●
●
●
TYP
±1.2
±0.5
±2
±0.5
±10
±30
±5
±0.3
±2
1
MAX
5
1
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
µV/°C
ppm/°C
ppm/°C
%FS
mV
LSB
RMS
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
External Reference
SENSE = 1V
14
–5
–1
–12
–2.5
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2
U
W
U
U
W W
W
U
LTC2295
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.7V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
Analog Input Leakage Current
SENSEA, SENSEB Input Leakage
MODE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
Figure 8 Test Circuit
0V < A
IN+
, A
IN–
< V
DD
0V < SENSEA, SENSEB < 1V
0V < MODE < V
DD
●
●
●
●
●
●
Analog Input Range (A
IN+
–A
IN–
)
Analog Input Common Mode (A
IN+
+A
IN–
)/2
DY A IC ACCURACY
SYMBOL
SNR
SFDR
SFDR
S/(N+D)
I
MD
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
70MHz Input
Spurious Free Dynamic Range
2nd or 3rd Harmonic
Spurious Free Dynamic Range
4th Harmonic or Higher
Signal-to-Noise Plus Distortion Ratio
Intermodulation Distortion
Crosstalk
5MHz Input
70MHz Input
5MHz Input
70MHz Input
5MHz Input
70MHz Input
f
IN
= 4.3MHz, 4.6MHz
f
IN
= 5MHz
●
●
●
●
U
W U
U
MIN
1
0.5
–1
–3
–3
TYP
±0.5
to
±1
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
µA
µA
µA
ns
ps
RMS
dB
MHz
0
0.2
80
575
MIN
71.6
75
80
71
TYP
74.4
73.2
90
85
90
90
74.4
73.1
90
–110
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
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LTC2295
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
LOGIC INPUTS (CLK, OE, SHDN, MUX)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
●
4
U
U
U
U
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
2.7V < V
DD
< 3.3V
–1mA < I
OUT
< 1mA
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
µA
pF
V
IN
= 0V to V
DD
(Note 7)
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
●
●
3
50
50
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
0.4
pF
mA
mA
V
V
V
V
V
V
V
V
2295fa
LTC2295
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply Voltage
Output Supply Voltage
Supply Current
Power Dissipation
Shutdown Power (Each Channel)
Nap Mode Power (Each Channel)
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
CONDITIONS
(Note 9)
(Note 9)
Both ADCs at f
S(MAX)
Both ADCs at f
S(MAX)
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
●
●
●
●
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
t
s
t
L
t
H
t
AP
t
D
t
MD
PARAMETER
Sampling Frequency
CLK Low Time
CLK High Time
Sample-and-Hold Aperture Delay
CLK to DATA Delay
MUX to DATA Delay
Data Access Time After OE↓
BUS Relinquish Time
Pipeline Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 10MHz, input range = 2V
P-P
with differential
drive, unless otherwise noted.
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
(Note 7)
●
●
●
●
TI I G CHARACTERISTICS
U W
MIN
2.7
0.5
TYP
3
3
40
120
2
15
MAX
3.4
3.6
46
138
UNITS
V
V
mA
mW
mW
mW
UW
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
●
●
●
●
●
MIN
1
40
5
40
5
1.4
1.4
TYP
50
50
50
50
0
2.7
2.7
4.3
3.3
5
MAX
10
500
500
500
500
5.4
5.4
10
8.5
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 0000 and
11 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 10MHz, input range = 1V
P-P
with differential
drive. The supply current and power dissipation are the sum total for both
channels with both channels active.
Note 9:
Recommended operating conditions.
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