IR3084U
XPHASE
TM
VR10, VR11 & OPTERON/ATHLON64 CONTROL IC
DESCRIPTION
The IR3084U Control IC combined with an IR
XPhase
Phase IC provides a full featured and flexible
way to implement a complete VR10, VR11, Opteron, or Athlon64 power solution. The “Control” IC
provides overall system control and interfaces with any number of “Phase” ICs which each drive and
TM
monitor a single phase of a multiphase converter. The XPhase architecture results in a power supply
that is smaller, less expensive, and easier to design while providing higher efficiency than conventional
approaches.
The IR3084U is based on the IR3084 VR10 Control IC, but incorporates the following modifications;
•
•
•
•
•
•
•
•
Supports VR11 7-bit VID, VR10 7-bit extended VID, and Opteron/Athlon64 5-bit VID codes
Supports both VR11 and legacy Opteron/Athlon64 start-up sequences
VID Select pin sets the DAC to VR10, VR11, or Opteron/Athlon64
INTL_MD output pin indicates which DAC is selected – Intel or AMD
VOSENS− float detection protects the CPU in the event that the VOSENS− trace is broken
Enable Input Thresholds set by VID Select pin to either VR10, VR11 or Opteron/Athlon64
VID Input Thresholds set by VID Select pin to either 0.6V (VR10/VR11) or 1.24V (AMD)
No-Load Setpoint Current changes polarity based on VID Select to accommodate VR10, VR11
(negative offset from DAC) or Opteron/Athlon64 (positive offset from DAC).
TM
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1 to X phase operation with matching Phase IC
7-bit VR 10/11 compatible VID with 0.5% overall system set point accuracy
5-bit Opteron/Athlon64 compatible VID with 1% overall system set point accuracy
Programmable Dynamic VID Slew Rate
+/-300mV Differential Remote Sense
Programmable VID Offset Voltage at the Error Amplifier’s Non-Inverting Input allows Zero Offset
Programmable 150kHz to 1MHz oscillator
Programmable VID Offset and Load Line output impedance
Programmable Hiccup Over-Current Protection with Delay to prevent false triggering
Simplified VR Ready output provides indication of proper operation and avoids false triggering
Operates from 12V input with 9.9V Under-Voltage Lockout
6.8V/6mA Bias Regulator provides System Reference Voltage
Phase IC Gate Driver Bias Regulator / VRHOT Comparator
Reduced Over-Current Detect Delay eliminates and external resistor in typical applications
Small thermally enhanced 28L MLPQ package
Page 1 of 47
June 1, 2009
IR3084U
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 9.5V
≤
V
CC
≤
16V, −0.3V
≤
VOSNS-
≤
0.3V,
o
o
0 C
≤
T
J
≤
100 C, ROSC = 24k , CSS/DEL = 0.1µF ±10%
PARAMETER
VDAC REFERENCE
VR10/VR11 System Set-Point
Accuracy (Deviation from
Tables 1 & 2 per test circuit in
Figure 1 which emulates in-VR
operation)
Opteron/Athlon64 System Set-
Point Accuracy
Source Current
Sink Current
VR10/VR11 VIDx Input
Threshold
Opteron/Athlon64 VIDx Input
Threshold
VIDx Input Bias Current
VIDx 11111x Blanking Delay
VIDSEL Pull up Voltage
VIDSEL Pull up Resistor
VIDSEL VR10/Opteron
Threshold
VIDSEL Opteron Voltage
VIDSEL Opteron/VR11
Threshold
ERROR AMPLIFIER
Input Offset Voltage
FB Bias Current
VSETPT Bias Current
VSETPT Bias Current
DC Gain
Gain Bandwidth Product
Corner Frequency
Slew Rate
Source Current
Sink Current
Max Voltage
Min Voltage
Measure V(FB) – V(VSETPT) per test
circuit in Figure 1. Applies to all VID
codes. Note 2.
VR10/VR11 Mode
Opteron/Athlon64 Mode
Note 1
Note 1
45 deg Phase Shift, Note 1
Note 1
−5
−1
48.5
−54
90
6
1.4
−1.2
0.5
150
30
0.0
−0.1
51
−47
100
10
200
3.2
−0.7
1.1
350
125
5
0.5
53.5
−39
110
400
5
−0.35
1.7
600
200
mV
µA
µA
µA
dB
MHz
Hz
V/µs
mA
mA
mV
mV
VID
≥
1V, 10k
≤ROSC≤100k
,
o
o
25 C
≤
T
J
≤
100 C
0.8V
≤
VID < 1V, 10k
≤ROSC≤100k
,
o
o
25 C
≤
T
J
≤
100 C
25 C
≤
T
J
≤
100 C
Includes OCSET and VSETPT currents
Includes OCSET and VSETPT currents
o
o
TEST CONDITION
MIN
TYP
MAX
UNIT
−0.5
0.5
%
−5
−1
104
92
500
1.04
113
100
600
1.24
0
1.3
2.4
4.5
0.6
1.3
1.95
+5
1
122
108
700
1.44
5
2.1
2.85
9
0.7
1.7
2.1
mV
%
µA
µA
mV
V
µA
µs
V
K
V
V
V
0V < VIDx < VCC
Measure Time till VRRDY drives low
VIDSEL Floating
VIDSEL “LOW”
6.49K from VIDSEL to GND
−5
0.5
1.95
2.25
0.5
0.9
1.8
VBIAS–VEAOUT (referenced to
VBIAS)
Normal operation or Fault mode
Page 4 of 47
June 1, 2009
IR3084U
PARAMETER
CURRENT SENSE INPUT
IIN BIAS CURRENT
IIN Preconditioning Pull-Down
Resistance
IIN Preconditioning RESET
Threshold
IIN Preconditioning SET
Threshold
VDRP BUFFER AMPLIFIER
Input Offset Voltage
Source Current
Sink Current
Bandwidth (-3dB)
Slew Rate
VBIAS REGULATOR
Output Voltage
Current Limit
Input Offset Voltage
OCSET Bias Current
SOFT START AND DELAY
Start Delay (TD1)
Soft Start Time (TD2)
VID Sample Delay (TD3)
DVID Slew Time & VRRDY
Delay (TD4+TD5)
PowerGood Delay
OC Delay Time
SS/DEL to FB Input Offset
Voltage
SS/DEL Charge Current
SS/DEL Discharge Current
Charge/Discharge Current
Ratio
OC Discharge Current
Charge Voltage
OC/VRRDY Delay Comparator
Threshold
OC/VRRDY Delay Comparator
Threshold
Delay Comparator Hysteresis
VID Sample Delay
Comparator Threshold
SS/DEL Discharge
Comparator Threshold
Page 5 of 47
RDRP =
∞
RDRP =
∞,
Time to reach 1.1V
VR10/VR11 mode only
VR10/VR11 mode only
Opteron/Athlon64 mode. Measured from
Vcore=1.1V to when VRRDY transitions HI.
TEST CONDITION
V(SS/DEL) > 0.85V, V(EAOUT) > 0.5V
V(SS/DEL) < 0.35V
V(EAOUT)
V(SS/DEL)
MIN
−2.0
5.6
0.20
0.35
TYP
−0.2
12.5
0.35
0.60
MAX
1.0
19.4
0.50
0.85
UNIT
µA
K
V
V
V(VDRP) – V(IIN), 0.5V < V(IIN) < 5V
0.5V < V(IIN) < 5V
0.5V < V(IIN) < 5V
Note 1
Note 1
−5mA < I(VBIAS) < 0mA
−10
−9.0
0.2
1
5
6.6
−35
−10
−53.5
1.2
0.8
0.2
0.5
0.7
150
−2
−6.8
0.85
6
10
6.9
−20
0
−51
1.8
1.8
1.0
1.3
2.3
250
1.3
70
6.5
11.2
40
3.85
80
100
20
3.10
215
6
−4.0
4.1
mV
mA
mA
MHz
V/µs
V
mA
mV
µA
ms
ms
ms
ms
ms
us
V
µA
µA
µA/µA
µA
V
mV
mV
mV
V
mV
7.2
−6
10
−48.5
2.6
2.8
2.5
2.2
4.7
350
1.5
100
9
12.5
60
4.1
OVER-CURRENT COMPARATOR
1V < V(OCSET) < 5V
With FB = 0V, adjust V(SS/DEL) until
EAOUT drives high
0.85
40
4
9.5
Note 1
Relative to Charge Voltage, SS/DEL
rising
Relative to Charge Voltage, SS/DEL
falling
Note 1
VR10/VR11 mode only
20
3.6
June 1, 2009
Microcontroller MCU
京公网安备 11010802033920号
EEWORLD
