60Hz, Sinusoidal, AC 1min, between connected all pins
and heat sink plate
Ratings
400
-20~+100
-40~+125
2500
Unit
V
°C
°C
V
rms
Fig. 1: T
C
MEASUREMENT POINT
Control terminals
17.7mm
18mm
Groove
IGBT chip position
FWDi chip position
Power terminals
Tc point
Heat sink side
THERMAL RESISTANCE
Symbol
R
th(j-c)Q
R
th(j-c)F
Parameter
Junction to case thermal
resistance
(Note 1)
Condition
Inverter IGBT part (per 1/6 module)
Inverter FWDi part (per 1/6 module)
Min.
-
-
Limits
Typ.
-
-
Max.
1.1
2.8
Unit
K/W
K/W
Note 1: Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100μm~+200μm on the contacting surface of
DIPIPM and heat sink. The contacting thermal resistance between DIPIPM case and heat sink Rth(c-f) is determined by the thickness and the thermal
conductivity of the applied grease. For reference, Rth(c-f) is about 0.3K/W (per 1/6 module, grease thickness: 20μm, thermal conductivity: 1.0W/m•k).
Publication Date : February 2014
2
< Dual-In-Line Package Intelligent Power Module >
PSS30S71F6
TRANSFER MOLDING TYPE
INSULATED TYPE
ELECTRICAL CHARACTERISTICS
(T
j
= 25°C, unless otherwise noted)
INVERTER PART
Symbol
V
CE(sat)
V
EC
t
on
t
C(on)
t
off
t
C(off)
t
rr
I
CES
Parameter
Collector-emitter saturation
voltage
FWDi forward voltage
V
D
=V
DB
= 15V, V
IN
= 5V
V
IN
= 0V, -I
C
= 30A
V
CC
= 300V, V
D
= V
DB
= 15V
I
C
= 30A, T
j
= 125°C, V
IN
= 0↔5V
Inductive Load (upper-lower arm)
T
j
= 25°C
T
j
= 125°C
Condition
I
C
= 30A, T
j
= 25°C
I
C
= 30A, T
j
= 125°C
Min.
-
-
-
0.95
-
-
-
-
-
-
Limits
Typ.
1.40
1.50
1.50
1.55
0.50
1.75
0.40
0.30
-
-
Limits
Typ.
-
-
-
-
0.48
-
-
-
-
2.64
-
-
2.4
1.00
2.10
1.30
0.80
0.9
20
Max.
1.90
2.00
2.00
2.15
0.80
2.35
0.60
-
1
10
Unit
V
V
μs
μs
μs
μs
μs
mA
Switching times
Collector-emitter cut-off
current
V
CE
=V
CES
CONTROL (PROTECTION) PART
Symbol
I
D
Circuit current
I
DB
V
SC(ref)
UV
DBt
UV
DBr
UV
Dt
UV
Dr
V
OT
V
FOH
V
FOL
t
FO
I
IN
V
th(on)
V
th(off)
V
th(hys)
V
F
R
Short circuit trip level
P-side Control supply
under-voltage protection(UV)
N-side Control supply
under-voltage protection(UV)
Temperature Output
Fault output voltage
Fault output pulse width
Input current
ON threshold voltage
OFF threshold voltage
ON/OFF threshold
hysteresis voltage
Bootstrap Di forward voltage
Parameter
Total of V
P1
-V
NC
, V
N1
-V
NC
Each part of V
UFB
- V
UFS
,
V
VFB
- V
VFS
, V
WFB
- V
WFS
V
D
= 15V
T
j
≤125°C
Trip level
Reset level
Trip level
Reset level
Condition
V
D
=15V, V
IN
=0V
V
D
=15V, V
IN
=5V
V
D
=V
DB
=15V, V
IN
=0V
V
D
=V
DB
=15V, V
IN
=5V
(Note 2)
Pull down R=5kΩ
(Note 3)
LVIC Temperature=90°C
V
SC
= 0V, F
O
terminal pulled up to 5V by 10kΩ
V
SC
= 1V, I
FO
= 1mA
(Note 4)
C
FO
=22nF
V
IN
= 5V
Applied between U
P
, V
P
, W
P
, U
N
, V
N
, W
N
-V
NC
I
F
=10mA including voltage drop by limiting resistor
(Note 5)
Min.
-
-
-
-
0.45
10.0
10.5
10.3
10.8
2.51
4.9
-
1.6
0.70
-
0.80
0.35
Max.
6.00
6.00
0.55
0.55
0.51
12.0
12.5
12.5
13.0
2.76
-
0.95
-
1.50
2.60
-
-
1.3
24
Unit
mA
V
V
V
V
V
V
V
V
ms
mA
V
V
Ω
Built-in limiting resistance
Included in bootstrap Di
0.5
16
Note 2 : SC protection works only for N-side IGBT. Please select the external shunt resistance such that the SC trip-level is less than 2.0 times of the current rating.
3 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperature rises excessively. When temperature exceeds the protective level that
user defined, controller (MCU) should stop the DIPIPM. Temperature of LVIC vs. VOT output characteristics is described in Fig. 3.
4 : Fault signal Fo outputs when SC or UV protection works. Fo pulse width is different for each protection modes. At SC failure, Fo pulse width is a fixed width
which is specified by the capacitor connected to C
FO
terminal. (
C
FO
=9.1 x 10
-6
x t
FO
[F])
, but at UV failure, Fo outputs continuously until recovering from UV
state. (But minimum Fo pulse width is the specified time by C
FO
.)
5 : The characteristics of bootstrap Di is described in Fig.2.
Fig. 2 Characteristics of bootstrap Di V
F
-I
F
curve (@Ta=25°C) including voltage drop by limiting resistor (Right chart is enlarged chart.)
800
700
600
500
50
45
40
35
30
25
20
15
10
5
0
0
1
2
3
4
5
6
7 8 9 10 11 12 13 14 15
V
F
[V]
0.0
0.2
0.4
0.6
0.8 1.0
V
F
[V]
1.2
1.4
1.6
1.8
I
F
[mA]
400
300
200
100
0
Publication Date : February 2014
3
I
F
[mA]
< Dual-In-Line Package Intelligent Power Module >
PSS30S71F6
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 3 Temperature of LVIC vs. V
OT
output characteristics
3.5
Max.
3.3
Typ.
3.1
Min.
2.9
2.7
VOT output (V)_
2.76
2.64
2.5
2.51
2.3
2.1
1.9
1.7
1.5
55
65
75
85
LVIC temperature (°C)
95
105
115
Fig. 4 V
OT
output circuit
Inside LVIC
of DIPIPM
Temperature
Signal
V
OT
Ref
V
NC
5kΩ
MCU
(1) It is recommended to insert 5kΩ (5.1kΩ is recommended) pull down resistor for getting linear output characteristics at low temperature
below room temperature. When the pull down resistor is inserted between V
OT
and V
NC
(control GND), the extra circuit current, which is
calculated approximately by V
OT
output voltage divided by pull down resistance, flows as LVIC circuit current continuously. In the case of
using V
OT
for detecting high temperature over room temperature only, it is unnecessary to insert the pull down resistor.
(2) In the case of using V
OT
with low voltage controller like 3.3V MCU, V
OT
output might exceed control supply voltage 3.3V when
temperature rises excessively. If system uses low voltage controller, it is recommended to insert a clamp Di between control supply of
the controller and V
OT
output for preventing over voltage destruction.
(3) In the case of not using V
OT
, leave V
OT
output NC (No Connection).
Refer the application note for this product about the usage of V
OT
.
Publication Date : February 2014
4
< Dual-In-Line Package Intelligent Power Module >
PSS30S71F6
TRANSFER MOLDING TYPE
INSULATED TYPE
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Mounting torque
Terminal pulling strength
Terminal bending strength
Weight
Heat-sink flatness
Note 6: Plain washers (ISO 7089~7094) are recommended.
Note 7: Measurement point of heat sink flatness
(Note 7)
Condition
Mounting screw : M3
(Note 6)
Load 9.8N
Load 4.9N, 90deg. bend
Recommended 0.78N·m
EIAJ-ED-4701
EIAJ-ED-4701
Min.
0.59
10
2
-
-50
Limits
Typ.
0.78
-
-
21
-
Max.
0.98
-
-
-
100
Unit
N·m
s
times
g
μm
12.78mm
-+
Measurement position
4.65mm
13.5mm
Heat sink side
+
-
23mm
Heat sink side
RECOMMENDED OPERATION CONDITIONS
Symbol
V
CC
V
D
V
DB
ΔV
D
, ΔV
DB
t
dead
f
PWM
I
O
PWIN(on)
Parameter
Supply voltage
Control supply voltage
Control supply voltage
Control supply variation
Arm shoot-through blocking time
PWM input frequency
Allowable r.m.s. current
Condition
Applied between P-NU, NV, NW
Applied between V
P1
-V
NC
, V
N1
-V
NC
Applied between V
UFB
-V
UFS
, V
VFB
-V
VFS
, V
WFB
-V
WFS
For each input signal
T
C
≤ 100°C, T
j
≤ 125°C
V
CC
= 300V, V
D
= 15V, P.F = 0.8,
Sinusoidal PWM
T
C
≤ 100°C, T
j
≤ 125°C
(Note8)
f
PWM
= 5kHz
f
PWM
= 15kHz
(Note 9)
Min.
0
13.5
13.0
-1
1.5
-
-
-
0.7
1.5
3.0
3.6
-5.0
-20
Limits
Typ.
300
15.0
15.0
-
-
-
-
-
-
-
-
-
-
-
Max.
400
16.5
18.5
+1
-
20
21.0
Unit
V
V
V
V/μs
μs
kHz
Arms
16.0
-
-
-
-
+5.0
+125
V
°C
μs
PWIN(off)
Minimum input pulse width
V
NC
T
j
V
NC
variation
Junction temperature
Below rated current
200V≤V
CC
≤350V,
Between rated current
13.5V≤V
D
≤16.5V,
and 1.7 times of rated
13.0V≤V
DB
≤18.5V,
current
-20°C≤Tc≤100°C,
Between 1.7 times and
N-line wiring inductance
2.0 times of rated current
less than 10nH (Note 10)
Between V
NC
-NU, NV, NW (including surge)
Note 8: Allowable r.m.s. current depends on the actual application conditions.
9: DIPIPM might not make response if the input signal pulse width is less than PWIN(on)
10: IPM might make delayed response or no response for the input signal with off pulse width less than PWIN(off). Please refer below about delayed response.
Delayed Response against Shorter Input Off Signal than PWIN(off) (P-side only)
P Side Control Input
Internal IGBT Gate
Real line: off pulse width > PWIN(off); turn on time t1
Broken line: off pulse width < PWIN(off); turn on time t2
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