345RPLF datasheet, PDF - EEWORLD Datasheet

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345RPLF: Descriptionclock synthesizer / jitter cleaner VERSAclock synthesizer; Categorysemiconductor Other integrated circuit (IC); File Size152KB，9 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/; Environmental Compliance

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345RPLF Overview

clock synthesizer / jitter cleaner VERSAclock synthesizer

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DATASHEET

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

ICS345

Description

The ICS345 field programmable clock synthesizer

generates up to nine high-quality, high-frequency clock

outputs including multiple reference clocks from a

low-frequency crystal or clock input. It is designed to

replace crystals and crystal oscillators in most electronic

systems.

Using IDT’s VersaClock

software to configure PLLs and

outputs, the ICS345 contains a One-Time Programmable

(OTP) ROM to allow field programmability. Programming

features include eight selectable configuration registers, up

to two sets of four low-skew outputs, and optional Spread

Spectrum outputs.

Using Phase-Locked Loop (PLL) techniques, the device

runs from a standard fundamental mode, inexpensive

crystal, or clock. It can replace multiple crystals and

oscillators, saving board space and cost.

The ICS345 is also available in factory programmed custom

versions for high-volume applications.

Features

•

Packaged as 20-pin SSOP (QSOP) (Pb-free)

Spread spectrum capability

Eight addressable registers

Replaces multiple crystals and oscillators

Output frequencies up to 200 MHz at 3.3 V

Input crystal frequency of 5 to 27 MHz

Input clock frequency of 2 to 50 MHz

Up to nine reference outputs

Up to two sets of four low-skew outputs

Operating voltages of 3.3 V

Advanced, low-power CMOS process

For one output clock, use the ICS341. For two output

clocks, see the ICS342. For three output clocks, see the

ICS343. For more than three outputs, see the ICS345 or

ICS348.

Block Diagram

VDD

S 2:S 0

OTP

ROM

w ith

P LL

V alues

P LL1 with

S pread

S pectrum

D ivide

Logic

and

O utput

E nable

C ontrol

C LK 1

C LK 2

C LK 3

P LL2

C LK 4

C LK 5

C LK 6

C LK 7

C LK 8

C rystal or

clock input

X 1/IC LK

C rystal

O scillator

P LL3

C LK 9

E xternal capacitors are

required w ith a crystal input.

GND

PD TS

IDT™ / ICS™

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER 1

ICS345

REV M 051310

345RPLF Related Products

	345RPLF	345RIPLF	345RIPLFT	345RPLFT
Description	clock synthesizer / jitter cleaner VERSAclock synthesizer	clock synthesizer / jitter cleaner VERSAclock synthesizer	IC VERSACLOCK SYNTHESIZER 20QSOP	IC VERSACLOCK SYNTHESIZER 20QSOP

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