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DPS2MX16MKJ3-45I

Description
SRAM Module, 2MX16, 45ns, CMOS, J LEAD, STACK, SLCC-52
Categorystorage    storage   
File Size739KB,8 Pages
ManufacturerB&B Electronics Manufacturing Company
Download Datasheet Parametric View All

DPS2MX16MKJ3-45I Overview

SRAM Module, 2MX16, 45ns, CMOS, J LEAD, STACK, SLCC-52

DPS2MX16MKJ3-45I Parametric

Parameter NameAttribute value
MakerB&B Electronics Manufacturing Company
Parts packaging codeQMA
package instruction,
Contacts52
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time45 ns
JESD-30 codeR-XQMA-J52
memory density33554432 bit
Memory IC TypeSRAM MODULE
memory width16
Number of functions1
Number of ports1
Number of terminals52
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX16
Output characteristics3-STATE
ExportableYES
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Parallel/SerialPARALLEL
Certification statusNot Qualified
Minimum standby current2 V
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal locationQUAD
Base Number Matches1
2Mx16, 20 - 45ns, STACK
30A129-08
A
32 Megabit High Speed CMOS SRAM
DPS2MX16MKn3
DESCRIPTION:
The DPS2MX16MKn3 High Speed SRAM ‘’STACK’’ modules are
a revolutionary new memory subsystem using Dense-Pac
Microsystems’ ceramic Stackable Leadless Chip Carriers (SLCC).
Available in straight leaded, ‘’J’’ leaded or gullwing leaded
packages. The module packs 32-Megabits of low-power CMOS
static RAM in an area as small as 0.549 in
2
, while maintaining a
total height as low as 0.545 inches.
The DPS2MX16MKn3 STACK modules contain eight individual
512K x 8 SRAMs, each packaged in a hermetically sealed SLCC,
making the modules suitable for commercial, industrial and
military applications.
By using SLCCs, the ‘’Stack’’ family of modules offer a higher
board density of memory than available with conventional
through-hole, surface mount or hybrid techniques.
SLCC Stack
Straight
Leaded
Stack
FEATURES:
Organizations Available:
2 Meg x 16
Access Times:
20*, 25, 30, 35, 45ns
Fully Static Operation - No clock or refresh required
Single +5V Power Supply,
±
10% Tolerance
TTL Compatible
Common Data Inputs and Outputs
Low Data Retention Voltage:
2.0V min.
Packages Available:
SLCC Stack
Straight Leaded Stack
‘’J’’ Leaded Stack
Gullwing Leaded Stack
‘’J’’ Leaded
Stack
*
Commercial and Industrial Grade only.
FUNCTIONAL BLOCK DIAGRAM
Gullwing
Leaded
Stack
PIN NAMES
A0 - A18
I/O0 - I/O15
CE0 - CE3
WE0, WE1
OE0, OE1
V
DD
V
SS
N.C.
30A129-08
REV. A
This document contains information on a product that is currently released
to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the
right to change products or specifications herein without prior notice.
Address Inputs
Data Input/Output
Low Chip Enables
Write Enables
Output Enables
Power (+5V)
Ground
No Connect
1
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