EEWORLDEEWORLDEEWORLD

Part Number

Search

8N3Q001BG-0129CD8

Description
LVPECL Output Clock Oscillator
CategoryPassive components    oscillator   
File Size203KB,21 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric View All

8N3Q001BG-0129CD8 Overview

LVPECL Output Clock Oscillator

8N3Q001BG-0129CD8 Parametric

Parameter NameAttribute value
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
maximum symmetry55/45 %
Other featuresENABLE/DISABLE FUNCTION; DIFFERENTIAL OUTPUT; TR
maximum descent time0.425 ns
Frequency Adjustment - MechanicalNO
longest rise time0.425 ns
Output load50 OHM
Nominal supply voltage2.5 V
frequency stability100%
Nominal operating frequency187.5 MHz
Oscillator typeLVPECL
Installation featuresSURFACE MOUNT
surface mountYES
Maximum operating temperature70 °C
Minimum operating temperature
physical size7.0mm x 5.0mm x 1.55mm
Objectid1263210631
Reach Compliance Codecompliant
Is SamacsysN
Is it Rohs certified?Yes
Quad-Frequency Programmable XO IDT8N3Q001 REV G
DATA SHEET
General Description
The IDT8N3Q001 is a Quad-Frequency Programmable Clock
Oscillator with very flexible frequency programming capabilities. The
device uses IDT’s fourth generation FemtoClock® NG technology for
an optimum of high clock frequency and low phase noise
performance. The device accepts 2.5V or 3.3V supply and is
packaged in a small, lead-free (RoHS 6) 10-lead Ceramic 5mm x
7mm x 1.55mm package.
Besides the four default power-up frequencies set by the FSEL0 and
FSEL1 pins, the IDT8N3Q001 can be programmed via the I
2
C
interface to output clock frequencies between 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz to a very high degree of
precision with a frequency step size of 435.9Hz ÷
N
(N is the PLL
output divider). Since the FSEL0 and FSEL1 pins are mapped to 4
independent PLL M and N divider registers (P, MINT, MFRAC and N),
reprogramming those registers to other frequencies under control of
FSEL0 and FSEL1 is supported. The extended temperature range
supports wireless infrastructure, telecommunication and networking
end equipment requirements.
Features
Fourth generation FemtoClock® NG technology
Programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
Four power-up default frequencies (see part number order
codes), re-programmable by I
2
C
I
2
C programming interface for the output clock frequency and
internal PLL control registers
Frequency programming resolution is 435.9Hz ÷N
One 2.5V, 3.3V LVPECL clock output
Two control inputs for the power-up default frequency
LVCMOS/LVTTL compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 0.244ps
(typical), integer PLL feedback configuration
RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 0.265ps
(typical), integer PLL feedback configuration
Full 2.5V or 3.3V supply modes
-40°C to 85°C ambient operating temperature
Available in Lead-free (RoHS 6) package
Block Diagram
OSC
f
XTAL
÷MINT,
MFRAC
2
25
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pin Assignment
÷P
PFD
&
LPF
FemtoClock® NG
VCO
1950-2600MHz
÷N
Q
nQ
DNU 1
OE 2
V
EE
3
FSEL0 4
FSEL1 5
10 SCLK
9 SDATA
8 V
CC
7 nQ
6 Q
7
Configuration Register (ROM)
(Frequency, APR, Polarity)
I
2
C Control
IDT8N3Q001
10-lead Ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
IDT8N3Q001GCD REVISION A
MARCH 6, 2012
1
©2012 Integrated Device Technology, Inc.
MT3608 Mobile phone commonly used 3.7V battery to 5V chip encountered problems solution
This time, the MT3608 chip was used. The 3.7V battery commonly used in mobile phones is converted to a 5V chip. The output voltage is always wrong, and the chip pin 3 is not 600mv. Finally, it was fou...
2638823746 Power technology
Stepper control system
Please give me some advice. I have an 800-type hot-cutting and heat-sealing bag-making machine and want to change it to a stepper control system. What type of motor and driver should I buy? What type ...
eeleader-mcu Industrial Control Electronics
Looking for Wince development engineer
Looking for Wince BSP development and application development engineers. Hope people with insight can contact us! peizhi78@126.com...
hygk Embedded System
FIR filter design based on FPGA (source code download attached)
[b][color=rgb(51, 51, 51)][font=宋体][size=14pt]1.1 [/size][/font][/color][b][color=rgb(51, 51, 51)][font=宋体][size=14pt]Top-level interface[/size][/font][/color][/b][/b]Full source code and full article...
njiggih FPGA/CPLD
Can the default font size be changed in WINCE5.0?
When using a high-resolution LCD, the fonts and menus of WINCE are displayed very small. Can the kernel be modified to increase the fonts and menus?...
ccxida Embedded System
About the Japanese
( 1) Four surgeons sat around and talked about what kind of people they liked to operate on. The first doctor said, "I like to operate on librarians the most. When you open their bodies, everything is...
890 Talking

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 142  2852  2403  2660  694  3  58  49  54  14 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号