FX-700-DAE-KNKA-F2-D8 datasheet, PDF

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FX-700-DAE-KNKA-F2-D8: DescriptionATM/SONET/SDH Support Circuit, 1-Func, CQCC16; CategoryWireless rf/communication Telecom circuit; File Size398KB，8 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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FX-700-DAE-KNKA-F2-D8 Overview

ATM/SONET/SDH Support Circuit, 1-Func, CQCC16

FX-700-DAE-KNKA-F2-D8 Parametric

Parameter Name	Attribute value
length	7.49 mm
Maximum seat height	2.13 mm
width	5.08 mm
Terminal location	QUAD
Number of terminals	16
encapsulated code	QCCN
Encapsulate equivalent code	LCC16,.3x.2,40
Package form	CHIP CARRIER
Terminal form	NO LEAD
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR
surface mount	YES
Terminal pitch	1.02 mm
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Nominal supply voltage (Vsup)	5 V
Is it Rohs certified?	Yes
YTEOL	0
Objectid	4018262142
Reach Compliance Code	Compliant
Is Samacsys	N
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
package instruction	SMD-16
Analog Integrated Circuits - Other Types	PLL FREQUENCY SYNTHESIZER
Number of functions	1
Maximum supply current (Isup)	40 mA
JESD-30 code	R-CQCC-N16

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FX-700

Low Jitter Frequency Translator

FX-700

Description

The FX-700 is a crystal-based frequency translator used in communications applications where low jitter is paramount.

Performance advantages include superior jitter performance, high output frequencies and small package size. Advanced custom

ASIC technology results in a highly robust, reliable and predictable device. The device is packaged in a 16 pad ceramic package

with a hermetic seam welded lid.

Features

•

5.0 x 7.5 mm, Hermetically sealed SMD package

Frequency Translation to 77.760 MHz

3.3 Volt or 5.0 Volt Supply

Tri-State Output allows board test

Lock Detect

Commercial or Industrial Temp. Range

CMOS Output

Absolute Pull Range Performance to +/-100 ppm

Capable of locking to an 8 kHz pulse/BITS clock

Product is free of lead and compliant to EC RoHS Directive

•

Applications

Frequency Translation, Clock Smoothing

Telecom - SONET/SDH/ATM

Datacom – DSLAM, DSLAR, Access Nodes

Base Station – GSM, CDMA

Cable Modem Head End

Block Diagram

(8)

C1 Charge

Pump Out

(5)

Charge

Pump

OUT

(3)

(16)

VCXO

OUT

(13)

FIN

(6)

(1-64)

Phase

Detector

& LD

(1-16384)

FOUT

(10)

(1)

(11)

(2)

(14)

VCXO

(12)

TRI-STATE

(4)

GND

(7, 9)

Figure 1. Functional block diagram

Page 1 of 8

Tape and Reel

Table 6. Tape and Reel Information

Tape Dimensions (mm)

7.5

1.5

20.2

Reel Dimensions (mm)

16.4

178

#/Reel

200

Figure 4. Tape and Reel

FX-700 Theory of Operation

The FX-700 includes an integrated phase detector, current mode charge pump, programmable frequency dividers and VCXO. The

FX-700 will translate an input frequency such as 8 kHz, 1.544 MHz or 19.440 MHz to a speciﬁc output frequency which is an integer

multiple (1-16384) of the input frequency and less than or equal to 77.760 MHz. For clock smoothing applications, the input

frequency is typically internally divided down by a factor of 64 (2N where N = 6) by the input frequency divider and this frequency

becomes an input to the phase detector. The integrated frequency dividers (factory programmed) and crystal based VCXO allows

for a large range of possible frequency translations and clock smoothing applications.

The FX-700’s PLL is a feedback system which forces the output frequency to lock in both phase and frequency to the input

frequency. While there will be some phase error, theory states there is no frequency error. The loop ﬁlter design will dictate many

key parameters such as jitter reduction, stability, lock range and acquisition time. The external second order passive loop ﬁlter is

a complex impedance in parallel with the input capacitance of the VCXO. The loop ﬁlter converts the charge pump output into

the VCXO’s control voltage. VI’s loop ﬁlter design methodology involves the calculation of the open loop gain bandwidth and

corresponding phase margin to determine the optimal component values that ensure high loop stability and acceptable lock in

time. As a rule of thumb, the VCXO gain is typically 100 ppm/volt and the charge pump current is typically 32 uA.

VI’s Applications Engineering staﬀ can provide the external loop ﬁlter component values required to meet speciﬁc system

requirements and application.

Suggested FX-700 Circuit Conﬁguration Drawing

Page 5 of 8

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