EFM32WG380F128-QFP100 datasheet, PDF

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EFM32WG380F128-QFP100: Descriptionarm microcontrollers - mcu 128kb flash 32kb ram; Categorysemiconductor Other integrated circuit (IC); File Size2MB，76 Pages; ManufacturerSilicon; Environmental Compliance

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EFM32WG380F128-QFP100 Overview

arm microcontrollers - mcu 128kb flash 32kb ram

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Preliminary

...the world's most energy friendly microcontrollers

EFM32WG380 DATASHEET

F256/F128/F64

Preliminary

•

ARM Cortex-M4 CPU platform

• High Performance 32-bit processor @ up to 48 MHz

• DSP instruction support and floating-point unit

• Memory Protection Unit

•

Flexible Energy Management System

• 20 nA @ 3 V Shutoff Mode

• 0.4µA @ 3 V Shutoff Mode with RTC

• 0.65 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out

Detector, RAM and CPU retention

• 0.95 µA @ 3 V Deep Sleep Mode, including RTC with 32.768 kHz

oscillator, Power-on Reset, Brown-out Detector, RAM and CPU

retention

• 67 µA/MHz @ 3 V Sleep Mode

• 230 µA/MHz @ 3 V Run Mode, with code executed from flash

•

256/128/64 KB Flash

•

32/32/32 KB RAM

•

81 General Purpose I/O pins

• Configurable push-pull, open-drain, pull-up/down, input filter, drive

strength

• Configurable peripheral I/O locations

• 16 asynchronous external interrupts

• Output state retention and wake-up from Shutoff Mode

•

12 Channel DMA Controller

•

12 Channel Peripheral Reflex System (PRS) for autonomous in-

ter-peripheral signaling

•

Hardware AES with 128/256-bit keys in 54/75 cycles

•

Timers/Counters

• 4× 16-bit Timer/Counter

• 4×3 Compare/Capture/PWM channels

• Dead-Time Insertion on TIMER0

• 16-bit Low Energy Timer

• 1× 24-bit Real-Time Counter and 1× 32-bit Real-Time Counter

• 3× 16/8-bit Pulse Counter

• Watchdog Timer with dedicated RC oscillator @ 50 nA

•

Backup Power Domain

• RTC and retention registers in a separate power domain, avail-

able in all energy modes

• Operation from backup battery when main power drains out

•

External Bus Interface for up to 4x256 MB of external

memory mapped space

• TFT Controller with Direct Drive

•

Communication interfaces

• 3× Universal Synchronous/Asynchronous Receiv-

er/Transmitter

• UART/SPI/SmartCard (ISO 7816)/IrDA/I2S

• 2× Universal Asynchronous Receiver/Transmitter

• 2× Low Energy UART

• Autonomous operation with DMA in Deep Sleep

Mode

• 2× I C Interface with SMBus support

• Address recognition in Stop Mode

• Universal Serial Bus (USB) with Host & OTG support

• Fully USB 2.0 compliant

• On-chip PHY and embedded 5V to 3.3V regulator

•

Ultra low power precision analog peripherals

• 12-bit 1 Msamples/s Analog to Digital Converter

• 8 single ended channels/4 differential channels

• On-chip temperature sensor

• 12-bit 500 ksamples/s Digital to Analog Converter

• 2× Analog Comparator

• Capacitive sensing with up to 16 inputs

• 3× Operational Amplifier

• 6.1 MHz GBW, Rail-to-rail, Programmable Gain

• Supply Voltage Comparator

•

Low Energy Sensor Interface (LESENSE)

• Autonomous sensor monitoring in Deep Sleep Mode

• Wide range of sensors supported, including LC sen-

sors and capacitive buttons

•

Ultra efficient Power-on Reset and Brown-Out Detec-

tor

•

Debug Interface

• 2-pin Serial Wire Debug interface

• 1-pin Serial Wire Viewer

• Embedded Trace Module v3.5 (ETM)

•

Pre-Programmed Serial Bootloader

•

Temperature range -40 to 85 ºC

•

Single power supply 1.85 to 3.8 V

•

LQFP100 package

32-bit ARM Cortex-M0+, Cortex-M3 and Cortex-M4 microcontrollers for:

• Energy, gas, water and smart metering

• Health and fitness applications

• Smart accessories

• Alarm and security systems

• Industrial and home automation

• www.energymicro.com/gecko

Preliminary

...the world's most energy friendly microcontrollers

2.1.3 Memory System Controller (MSC)

The Memory System Controller (MSC) is the program memory unit of the EFM32WG microcontroller.

The flash memory is readable and writable from both the Cortex-M4 and DMA. The flash memory is

divided into two blocks; the main block and the information block. Program code is normally written to

the main block. Additionally, the information block is available for special user data and flash lock bits.

There is also a read-only page in the information block containing system and device calibration data.

Read and write operations are supported in the energy modes EM0 and EM1.

2.1.4 Direct Memory Access Controller (DMA)

The Direct Memory Access (DMA) controller performs memory operations independently of the CPU.

This has the benefit of reducing the energy consumption and the workload of the CPU, and enables

the system to stay in low energy modes when moving for instance data from the USART to RAM or

from the External Bus Interface to a PWM-generating timer. The DMA controller uses the PL230 µDMA

controller licensed from ARM.

2.1.5 Reset Management Unit (RMU)

The RMU is responsible for handling the reset functionality of the EFM32WG.

2.1.6 Energy Management Unit (EMU)

The Energy Management Unit (EMU) manage all the low energy modes (EM) in EFM32WG microcon-

trollers. Each energy mode manages if the CPU and the various peripherals are available. The EMU

can also be used to turn off the power to unused SRAM blocks.

2.1.7 Clock Management Unit (CMU)

The Clock Management Unit (CMU) is responsible for controlling the oscillators and clocks on-board the

EFM32WG. The CMU provides the capability to turn on and off the clock on an individual basis to all

peripheral modules in addition to enable/disable and configure the available oscillators. The high degree

of flexibility enables software to minimize energy consumption in any specific application by not wasting

power on peripherals and oscillators that are inactive.

2.1.8 Watchdog (WDOG)

The purpose of the watchdog timer is to generate a reset in case of a system failure, to increase appli-

cation reliability. The failure may e.g. be caused by an external event, such as an ESD pulse, or by a

software failure.

2.1.9 Peripheral Reflex System (PRS)

The Peripheral Reflex System (PRS) system is a network which lets the different peripheral module

communicate directly with each other without involving the CPU. Peripheral modules which send out

Reflex signals are called producers. The PRS routes these reflex signals to consumer peripherals which

apply actions depending on the data received. The format for the Reflex signals is not given, but edge

triggers and other functionality can be applied by the PRS.

2.1.10 External Bus Interface (EBI)

The External Bus Interface provides access to external parallel interface devices such as SRAM, FLASH,

ADCs and LCDs. The interface is memory mapped into the address bus of the Cortex-M4. This enables

seamless access from software without manually manipulating the IO settings each time a read or write

is performed. The data and address lines are multiplexed in order to reduce the number of pins required

2013-06-28 - EFM32WG380FXX - d0192_Rev1.20

www.energymicro.com

Preliminary

...the world's most energy friendly microcontrollers

to interface the external devices. The timing is adjustable to meet specifications of the external devices.

The interface is limited to asynchronous devices.

2.1.11 TFT Direct Drive

The EBI contains a TFT controller which can drive a TFT via a 565 RGB interface. The TFT controller

supports programmable display and port sizes and offers accurate control of frequency and setup and

hold timing. Direct Drive is supported for TFT displays which do not have their own frame buffer. In

that case TFT Direct Drive can transfer data from either on-chip memory or from an external memory

device to the TFT at low CPU load. Automatic alpha-blending and masking is also supported for transfers

through the EBI interface.

2.1.12 Universal Serial Bus Controller (USB)

The USB is a full-speed USB 2.0 compliant OTG host/device controller. The USB can be used in Device,

On-the-go (OTG) Dual Role Device or Host-only configuration. In OTG mode the USB supports both

Host Negotiation Protocol (HNP) and Session Request Protocol (SRP). The device supports both full-

speed (12MBit/s) and low speed (1.5MBit/s) operation. The USB device includes an internal dedicated

Descriptor-Based Scatter/Garther DMA and supports up to 6 OUT endpoints and 6 IN endpoints, in

addition to endpoint 0. The on-chip PHY includes all OTG features, except for the voltage booster for

supplying 5V to VBUS when operating as host.

2.1.13 Inter-Integrated Circuit Interface (I2C)

The I C module provides an interface between the MCU and a serial I C-bus. It is capable of acting as

both a master and a slave, and supports multi-master buses. Both standard-mode, fast-mode and fast-

mode plus speeds are supported, allowing transmission rates all the way from 10 kbit/s up to 1 Mbit/s.

Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant system.

The interface provided to software by the I C module, allows both fine-grained control of the transmission

process and close to automatic transfers. Automatic recognition of slave addresses is provided in all

energy modes.

2.1.14 Universal Synchronous/Asynchronous Receiver/Transmitter (US-

ART)

The Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible

serial I/O module. It supports full duplex asynchronous UART communication as well as RS-485, SPI,

MicroWire and 3-wire. It can also interface with ISO7816 SmartCards, IrDA and I2S devices.

2.1.15 Pre-Programmed Serial Bootloader

The bootloader presented in application note AN0003 is pre-programmed in the device at factory. Auto-

baud and destructive write are supported. The autobaud feature, interface and commands are described

further in the application note.

2.1.16 Universal Asynchronous Receiver/Transmitter (UART)

The Universal Asynchronous serial Receiver and Transmitter (UART) is a very flexible serial I/O module.

It supports full- and half-duplex asynchronous UART communication.

2.1.17 Low Energy Universal Asynchronous Receiver/Transmitter

(LEUART)

The unique LEUART , the Low Energy UART, is a UART that allows two-way UART communication on

a strict power budget. Only a 32.768 kHz clock is needed to allow UART communication up to 9600 baud/

2013-06-28 - EFM32WG380FXX - d0192_Rev1.20

www.energymicro.com

EFM32WG380F128-QFP100 Related Products

	EFM32WG380F128-QFP100	EFM32WG380F256-QFP100T	EFM32WG380F64-QFP100T
Description	arm microcontrollers - mcu 128kb flash 32kb ram	arm microcontrollers - mcu 256k flash 32k ram usb aes	arm microcontrollers - mcu 64k flash 32k ram usb aes

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