dsPIC33EPXXXGM3XX/6XX/7XX
16-Bit Digital Signal Controllers with High-Speed PWM,
Op Amps and Advanced Analog Features
Operating Conditions
• 3.0V to 3.6V, -40°C to +85°C, up to 70 MIPS
• 3.0V to 3.6V, -40°C to +125°C, up to 60 MIPS
Timers/Output Compare/Input Capture
• 21 General Purpose Timers:
- Nine 16-bit and up to four 32-bit timers/counters
- Eight output capture modules configurable as
timers/counters
- PTG module with two configurable timers/counters
- Two 32-bit Quadrature Encoder Interface (QEI)
modules configurable as a timer/counter
• Eight Input Capture modules
• Peripheral Pin Select (PPS) to allow Function Remap
• Peripheral Trigger Generator (PTG) for Scheduling
Complex Sequences
Core: 16-Bit dsPIC33E CPU
•
•
•
•
•
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Clock Management
•
•
•
•
•
Internal Fast FRC Oscillator with 1% Accuracy
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Communication Interfaces
• Four Enhanced Addressable UART modules
(17.5 Mbps):
- With support for LIN/J2602 protocols and IrDA
®
• Three 3-Wire/4-Wire SPI modules (15 Mbps)
• 25 Mbps Data Rate for Dedicated SPI module
(with no PPS)
• Two I
2
C™ modules (up to 1 Mbps) with SMBus Support
• Two ECAN™ modules (1 Mbps) with CAN 2.0B Support
• Programmable Cyclic Redundancy Check (CRC)
• Codec Interface module (DCI) with I
2
S Support
Power Management
•
•
•
•
•
Low-Power Management modes (Sleep, Idle, Doze)
Executing Optimized
NOP
String with Flash Fetch
Integrated Power-on Reset and Brown-out Reset
0.6 mA/MHz Dynamic Current (typical)
30 µA I
PD
Current (typical)
High-Speed PWM
• Up to 12 PWM Outputs (six generators)
• Primary Master Time Base Inputs allow Time Base
Synchronization from Internal/External Sources
• Dead Time for Rising and Falling Edges
• 7.14 ns PWM Resolution
• PWM Support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault Inputs
• Flexible Trigger Configurations for ADC Conversions
• Supports PWM Lock, PWM Output Chopping and
Dynamic Phase Shifting
Direct Memory Access (DMA)
• 4-Channel DMA with User-Selectable Priority Arbitration
• Peripherals Supported by the DMA Controller include:
- UART, SPI, ADC, ECAN and input capture
- Output compare and timers
Input/Output
• Sink/Source 15 mA or 10 mA, Pin-Specific for
Standard V
OH
/V
OL
• 5V Tolerant Pins
• Selectable Open-Drain, Pull-ups and Pull-Downs
• Up to 5 mA Overvoltage Clamp Current
• Change Notice Interrupts on All I/O Pins
• PPS to allow Function Remap
Advanced Analog Features
• Two Independent ADC modules:
- Configurable as 10-bit, 1.1 Msps with
four S&H or 12-bit, 500 ksps with one S&H
- 11, 13, 18, 30 or 49 analog inputs
• Flexible and Independent ADC Trigger Sources
• Up to Four Op Amp/Comparators with Direct
Connection to the ADC module:
- Additional dedicated comparator
- Programmable references with 32 voltage points
- Programmable blanking and filtering
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40°C to +125°C) Planned
• AEC-Q100 REVG (Grade 0 -40°C to +150°C) Planned
• Class B Safety Library, IEC 60730
Debugger Development Support
•
•
•
•
In-Circuit and In-Application Programming
Three Complex and Five Simple Breakpoints
IEEE 1149.2 Compatible (JTAG) Boundary Scan
Trace and Run-Time Watch
2013 Microchip Technology Inc.
DS70000689C-page 1
dsPIC33EPXXXGM3XX/6XX/7XX
Pin Diagrams
44-Pin TQFP
(1,2)
= Pins are up to 5V tolerant
TCK/AN26/CV
REF1O
/ASCL1/RP40/T4CK/RB8
OA5OUT/AN25/C5IN4-/RP39/INT0/RB7
AN31/CV
REF2O
/SCL1/RPI53/RC5
PGED2/ASDA2/RP37/RB5
PGEC2/ASCL2/RP38/RB6
V
DD
44
43
42
41
40
39
V
SS
38
37
36
35
TMS/OA5IN-/AN27/C5IN1-/ASDA1/SDI1/RP41/RB9
RP54/PWM6H/RC6
RP55/PWM6L/RC7
RP56/PWM5H/RC8
RP57/PWM5L/RC9
V
SS
V
CAP
RP42/PWM3H/RB10
RP43/PWM3L/RB11
RPI44/PWM2H/RB12
RPI45/PWM2L/CTPLS/RB13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
34
33
32
31
30
29
28
27
26
25
24
23
OA5IN+/AN24/C5IN3-/C5IN1+/SDO1/RP20/T1CK/RA4
AN30/SDA1/RPI52/RC4
AN29/SCK1/RPI51/RC3
AN28/SDI1/RPI25/RA9
FLT32/SCL2/RP36/RB4
SDA2/RPI24/RA8
OSC2/CLKO/RPI19/RA3
AN32/OSC1/CLKI/RPI18/RA2
V
SS
V
DD
OA4IN+/AN8/C3IN3-/C3IN1+/RPI50/U1RTS/BCLK1/FLT3/RC2
OA3IN-/AN7/C3IN1-/C4IN1-/RP49/RC1
OA3OUT/AN6/C3IN4-/C4IN4-/C4IN1+/RP48/OCFB/RC0
PGED1/OA1IN-/AN5/C1IN1-/CTMUC/RP35/RB3
PGEC1/OA1IN+/AN4/C1IN3-/C1IN1+/C2IN3-/RPI34/RB2
dsPIC33EPXXXGM304/604
AV
DD
AV
SS
TDO/PWM4H/RA10
MCLR
OA2OUT/AN0/C2IN4-/C5IN2-/C4IN3-/RPI16/RA0
PGED3/V
REF
-/OA2IN-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
TDI/PWM4L/RA7
RPI46/PWM1H/T3CK/T7CK/RB14
Note 1:
2:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral
Pin Select (PPS)”
for available peripherals and for information on limitations.
Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See
Section 11.0 “I/O
Ports”
for more information.
2013 Microchip Technology Inc.
PGEC3/V
REF
+/CV
REF
+/OA1OUT/AN3/C1IN4-/C4IN2-/RPI33/CTED1/RB1
RPI47/PWM1L/T5CK/T6CK/RB15
OA2IN+/AN1/C2IN3-/C2IN1+/RPI17/RA1
DS70000689C-page 3
dsPIC33EPXXXGM3XX/6XX/7XX
Pin Diagrams (Continued)
44-Pin QFN
(1,2,3)
= Pins are up to 5V tolerant
44 43 42 41 40 39 38 37 36 35 34
TMS/OA5IN-/AN27/C5IN1-/ASDA1/SDI1/RP41/RB9
RP54/PWM6H/RC6
RP55/PWM6L/RC7
RP56/PWM5H/RC8
RP57/PWM5L/RC9
V
SS
V
CAP
RP42/PWM3H/RB10
RP43/PWM3L/RB11
RPI44/PWM2H/RB12
RPI45/PWM2L/CTPLS/RB13
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
TDO/PWM4H/RA10
TDI/PWM4L/RA7
MCLR
PGED3/V
REF
-/OA2IN-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
RPI46/PWM1H/T3CK/T7CK/RB14
RPI47/PWM1L/T5CK/T6CK/RB15
OA2OUT/AN0/C2IN4-/C4IN3-/RPI16/RA0
PGEC3/V
REF
+/CV
REF
+/OA1OUT/AN3/C1IN4-/C4IN2-/RPI33/CTED1/RB1
OA2IN+/AN1/C2IN3-/C2IN1+/RPI17/RA1
AV
DD
AV
SS
33
32
31
30
29
FLT32/SCL2/RP36/RB4
SDA2/RPI24/RA8
OSC2/CLKO/RPI19/RA3
AN32/OSC1/CLKI/RPI18/RA2
V
SS
V
DD
OA3IN+/AN8/C3IN3-/C3IN1+/RPI50/U1RTS/BCLK1/FLT3/RC2
OA3IN-/AN7/C3IN1-/C4IN1-/RP49/RC1
OA3OUT/AN6/C3IN4-/C4IN4-/C4IN1+/RP48/OCFB/RC0
PGED1/OA1IN-/AN5/C1IN1-/CTMUC/RP35/RB3
PGEC1/OA1IN+/AN4/C1IN3-/C1IN1+/C2IN3-/RPI34/RB2
OA5IN+/AN24/C5IN3-/C5IN1+/SDO1/RP20/T1CK/RA4
28
27
26
25
24
23
TCK/AN26/CV
REF1O
/ASCL1/RP40/T4CK/RB8
OA5OUT/AN25/C5IN4-/RP39/INT0/RB7
AN31/CV
REF2O
/SCL1/RPI53/RC5
PGED2/ASDA2/RP37/RB5
PGEC2/ASCL2/RP38/RB6
AN30/SDA1/RPI52/RC4
AN29/SCK1/RPI51/RC3
dsPIC33EPXXXGM304/604
Note 1:
2:
3:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral
Pin Select (PPS)”
for available peripherals and for information on limitations.
Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See
Section 11.0 “I/O
Ports”
for more information.
The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to
V
SS
externally.
AN28/SDI1/RPI25/RA9
V
DD
V
SS
DS70000689C-page 4
2013 Microchip Technology Inc.
dsPIC33EPXXXGM3XX/6XX/7XX
Pin Diagrams (Continued)
64-Pin TQFP
(1,2,3)
= Pins are up to 5V tolerant
64
63
62
61
60
59
58
57
56
55
54
53
52
51
TDI/PWM4L/PMD5/RA7
RPI46/PWM1H/T3CK/T7CK/PMD6/RB14
RPI47/PWM1L/T5CK/T6CK/PMD7/RB15
AN19/RP118/PMA5/RG6
AN18/ASCL1/RPI119/PMA4/RG7
AN17/ASDA1/RP120/PMA3/RG8
MCLR
AN16/RPI121/PMA2/RG9
V
SS
V
DD
AN10/RPI28/RA12
AN9/RPI27/RA11
OA2OUT/AN0/C2IN4-/C4IN3-/RPI16/RA0
OA2IN+/AN1/C2IN3-/C2IN1+/RPI17/RA1
PGED3/V
REF
-/OA2IN-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/CV
REF
+/OA1OUT/AN3/C1IN4-/C4IN2-/RPI33/CTED1/RB1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
50
49
TDO/PWM4H/PMD4/RA10
RPI45/PWM2L/CTPLS/PMD3/RB13
RPI44/PWM2H/PMD2/RB12
RP43/PWM3L/PMD1/RB11
RP42/PWM3H/PMD0/RB10
RP97/RF1
RPI96/RF0
V
DD
V
CAP
RP57/PWM5L/RC9
RP70/RD6
RP69/PMRD/RD5
RP56/PWM5H/PMWR/RC8
RP55/PWM6L/PMBE/RC7
RP54/PWM6H/RC6
TMS/OA5IN-/AN25/C5IN4-/RP41/RB9
48
47
46
45
44
dsPIC33EP128GM306/706
dsPIC33EP256GM306/706
dsPIC33EP512GM306/706
43
42
41
40
39
38
37
36
35
34
33
TCK/AN26/CV
REF1O
/SOSCO/RP40/T4CK/RB8
SOSCI/RPI61/RC13
OA5OUT/AN25/C5IN4-/RP39/INT0/RB7
AN48/CV
REF2O
/RPI58/PMCS1/RC10
PGEC2/ASCL2/RP38/PMCS2/RB6
PGED2/ASDA2/RP37/RB5
RPI72/RD8
V
SS
OSC2/CLKO/RPI63/RC15
AN49/OSC1/CLKI/RPI60/RC12
V
DD
AN31/SCL1/RPI53/RC5
AN30/SDA1/RPI52/RC4
AN29/SCK1/RPI51/RC3
AN28/SDI1/RPI25/RA9
OA5IN+/AN24/C5IN3-/C5IN1+/SDO1/RP20/T1CK/RA4
19
20
21
22
23
24
25
26
27
28
29
30
31
Note 1:
2:
3:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4 “Peripheral
Pin Select (PPS)”
for available peripherals and for information on limitations.
Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See
Section 11.0 “I/O
Ports”
for more information.
This pin is not available as an input when OPMODE (CMxCON<10>) =
1.
2013 Microchip Technology Inc.
PGEC1/OA1IN+/AN4/C1IN3-/C1IN1+/C2IN3-/RPI34/RB2
PGED1/OA1IN-/AN5/C1IN1-/(CTMUC)/RP35/RTCC/RB3
AV
DD
AV
SS
OA3OUT/AN6/C3IN4-/C4IN1+/RP48/OCFB/RC0
OA3IN-/AN7/C3IN1-/C4IN1-/RP49/RC1
OA3IN+/AN8/C3IN3-/C3IN1+/RPI50/U1RTS/BCLK1/FLT3/RC2
AN11/C1IN2-/U1CTS/FLT4/PMA12/RC11
V
SS
V
DD
AN12/C2IN2-/C5IN2-/U2RTS/BCLK2/FLT5/PMA11/RE12
AN13/C3IN2-/U2CTS/FLT6/PMA10/RE13
AN14/RPI94/FLT7/PMA1/RE14
AN15/RPI95/FLT8/PMA0/RE15
SDA2/RPI24/PMA9/RA8
FLT32/SCL2/RP36/PMA8/RB4
32
DS70000689C-page 5