ATMEGA165P-16ANR datasheet, PDF

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ATMEGA165P-16ANR: Description8-bit microcontrollers - mcu avr 16kb FL 512b EE 1kb sram-16mhz 105c; Categorysemiconductor Other integrated circuit (IC); File Size5MB，365 Pages; ManufacturerAtmel (Microchip); Environmental Compliance

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ATMEGA165P-16ANR Overview

8-bit microcontrollers - mcu avr 16kb FL 512b EE 1kb sram-16mhz 105c

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Features

•

High Performance, Low Power Atmel

AVR

8-Bit Microcontroller

•

Advanced RISC Architecture

– 130 Powerful Instructions – Most Single Clock Cycle Execution

– 32 × 8 General Purpose Working Registers

– Fully Static Operation

– Up to 16 MIPS Throughput at 16 MHz

– On-Chip 2-cycle Multiplier

High Endurance Non-volatile Memory segments

– 16 Kbytes of In-System Self-programmable Flash program memory

– 512 Bytes EEPROM

– 1 Kbytes Internal SRAM

– Write/Erase cyles: 10,000 Flash/100,000 EEPROM

(1)(3)

– Data retention: 20 years at 85°C/100 years at 25°C

(2)(3)

– Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

– Programming Lock for Software Security

JTAG (IEEE std. 1149.1 compliant) Interface

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode

– Real Time Counter with Separate Oscillator

– Four PWM Channels

– 8-channel, 10-bit ADC

– Programmable Serial USART

– Master/Slave SPI Serial Interface

– Universal Serial Interface with Start Condition Detector

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated Oscillator

– External and Internal Interrupt Sources

– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby

I/O and Packages

– 54 Programmable I/O Lines

– 64-lead TQFP and 64-pad QFN/MLF

Speed Grade:

– ATmega165PV: 0 - 4 MHz @ 1.8V - 5.5V, 0 - 8 MHz @ 2.7V - 5.5V

– ATmega165P: 0 - 8 MHz @ 2.7V - 5.5V, 0 - 16 MHz @ 4.5V - 5.5V

Temperature range:

– -40°C to 85°C Industrial

Ultra-Low Power Consumption

– Active Mode:

1 MHz, 1.8V: 330 µA

32 kHz, 1.8V: 10 µA (including Oscillator)

– Power-down Mode:

0.1 µA at 1.8V

– Power-save Mode:

0.6 µA at 1.8V(Including 32 kHz RTC)

•

8-bit

Microcontroller

with 16K Bytes

In-System

Programmable

Flash

ATmega165P

ATmega165PV

Preliminary

•

Notes:

1. Worst case temperature. Guaranteed after last write cycle.

2. Failure rate less than 1 ppm.

3. Characterized through accelerated tests.

8019K–AVR–11/10

ATmega165P

The AVR core combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs up to ten times faster than con-

ventional CISC microcontrollers.

The ATmega165P provides the following features: 16 Kbytes of In-System Programmable Flash

with Read-While-Write capabilities, 512 bytes EEPROM, 1 Kbyte SRAM, 53 general purpose I/O

lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip

Debugging support and programming, three flexible Timer/Counters with compare modes, inter-

nal and external interrupts, a serial programmable USART, Universal Serial Interface with Start

Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal

Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode

stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to con-

tinue functioning. The Power-down mode saves the register contents but freezes the Oscillator,

disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode,

the asynchronous timer continues to run, allowing the user to maintain a timer base while the

rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O mod-

ules except asynchronous timer and ADC, to minimize switching noise during ADC conversions.

In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleep-

ing. This allows very fast start-up combined with low-power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The

On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI

serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot pro-

gram running on the AVR core. The Boot program can use any interface to download the

application program in the Application Flash memory. Software in the Boot Flash section will

continue to run while the Application Flash section is updated, providing true Read-While-Write

operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a

monolithic chip, the Atmel ATmega165P is a powerful microcontroller that provides a highly flex-

ible and cost effective solution to many embedded control applications.

The ATmega165P AVR is supported with a full suite of program and system development tools

including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,

and Evaluation kits.

8019K–AVR–11/10

ATmega165P

2.2

2.2.1

Pin Descriptions

VCC

Digital supply voltage.

2.2.2

GND

Ground.

2.2.3

Port A (PA7..PA0)

Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port A output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

2.2.4

Port B (PB7:PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B has better driving capabilities than the other ports.

Port B also serves the functions of various special features of the ATmega165P as listed on

“Alternate Functions of Port B” on page 69.

2.2.5

Port C (PC7:PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port C output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

2.2.6

Port D (PD7:PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port D also serves the functions of various special features of the ATmega165P as listed on

“Alternate Functions of Port D” on page 72.

2.2.7

Port E (PE7:PE0)

Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port E output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up

8019K–AVR–11/10

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