72211L15PFI datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > semiconductor> Other integrated circuit (IC)> 72211L15PFI

72211L15PFI: Descriptionfifo 512 X 9 sync fifo; Categorysemiconductor Other integrated circuit (IC); File Size286KB，14 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

Download Datasheet View All

72211L15PFI Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	72211L15PFI	-	-	View	Buy Now

72211L15PFI Overview

fifo 512 X 9 sync fifo

Preview

Download Datasheet

View All

CMOS SyncFIFO

™

64 x 9, 256 x 9, 512 x 9,

1,024 x 9, 2,048 x 9,

4,096 x 9 and 8,192 x 9

FEATURES:

•

IDT72421, IDT72201

IDT72211, IDT72221

IDT72231, IDT72241

IDT72251

64 x 9-bit organization (IDT72421)

256 x 9-bit organization (IDT72201)

512 x 9-bit organization (IDT72211)

1,024 x 9-bit organization (IDT72221)

2,048 x 9-bit organization (IDT72231)

4,096 x 9-bit organization (IDT72241)

8,192 x 9-bit organization (IDT72251)

10 ns read/write cycle time

Read and Write Clocks can be independent

Dual-Ported zero fall-through time architecture

Empty and Full Flags signal FIFO status

Programmable Almost-Empty and Almost-Full flags can be set

to any depth

Programmable Almost-Empty and Almost-Full flags default to

Empty+7, and Full-7, respectively

Output enable puts output data bus in high-impedance state

Advanced submicron CMOS technology

Available in the 32-pin plastic leaded chip carrier (PLCC) and

32-pin Thin Quad Flat Pack (TQFP)

For through-hole product please see the IDT72420/72200/72210/

72220/72230/72240 data sheet

Industrial temperature range (–40°C to +85°C) is available

Green parts available, see ordering information

The IDT72421/72201/72211/72221/72231/72241/72251 SyncFIFO™

are very high-speed, low-power First-In, First-Out (FIFO) memories with

clocked read and write controls. These devices have a 64, 256, 512, 1,024,

2,048, 4,096, and 8,192 x 9-bit memory array, respectively. These FIFOs are

applicable for a wide variety of data buffering needs such as graphics, local area

networks and interprocessor communication.

These FIFOs have 9-bit input and output ports. The input port is controlled

by a free-running clock (WCLK), and two write enable pins (WEN1, WEN2).

Data is written into the Synchronous FIFO on every rising clock edge when

the write enable pins are asserted. The output port is controlled by another clock

pin (RCLK) and two read enable pins (REN1,

REN2).

The Read Clock can

be tied to the Write Clock for single clock operation or the two clocks can run

asynchronous of one another for dual-clock operation. An output enable pin

(OE) is provided on the read port for three-state control of the output.

The Synchronous FIFOs have two fixed flags, Empty (EF) and Full (FF).

Two programmable flags, Almost-Empty (PAE) and Almost-Full (PAF), are

provided for improved system control. The programmable flags default to

Empty+7 and Full-7 for

PAE

and

PAF,

respectively. The programmable flag

offset loading is controlled by a simple state machine and is initiated by asserting

the load pin (LD).

These FIFOs are fabricated using high-speed submicron CMOS technology.

DESCRIPTION:

FUNCTIONAL BLOCK DIAGRAM

WCLK

WEN1

WEN2

- D

INPUT REGISTER

OFFSET REGISTER

PAE

PAF

WRITE CONTROL

LOGIC

RAM ARRAY

64 x 9, 256 x 9,

512 x 9, 1,024 x 9,

2,048 x 9, 4,096 x 9,

8,192 x 9

FLAG

LOGIC

WRITE POINTER

READ POINTER

READ CONTROL

LOGIC

OUTPUT REGISTER

RESET LOGIC

RCLK

REN1

REN2

- Q

2655 drw01

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The SyncFIFO is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

2013

AUGUST 2013

DSC-2655/6

Recommended Resources

bistable circuit with relay

Power amplifier circuit diagram b

Introduction control circuit of open circuit relay

Phase error judgment circuit

Light controlled electric toy circuit

Wireless microphone circuit

How to cancel automatic sleep in Windows CE: On Windows mobile 5.0, I can use SystemIdleTimerReset() to cancel the automatic sleep mode, but it does not work on Windows CE. How can I cancel the automatic sleep mode?...; zhrglchp Embedded System

Show the process of WEBENCH design + laptop power supply design: This design uses a 220V AC power supply and outputs a 19V DC power supply for laptops....; gaoyang9992006 Analogue and Mixed Signal

I am new to layout. I have detailed allegro software installation steps. What is the success rate?: Take the installation steps of Cadence Allegro software as an example; Step 1: Insert the CD and execute automatically (or execute setup.exe) to enter the main installation interface.Step 2: Install t...; kdyhdl PCB Design

32.768KHz crystal oscillator: 32.768KHz is a standard frequency. The oscillation signal generated by the 32.768KHz clock crystal is divided 15 times by the internal divider of the quartz clock to get the 1Hz second signal, that is...; 唐辉电子92 MCU

[Help] About the external interrupt INT0 of C8051F040: I want to use P3.0 of C8051F040 as external interrupt pin - INT0. I have observed the waveform on the pin with an oscilloscope and everything is normal, but I can't enter the external interrupt servic...; 38824520 Embedded System

Newbie help - Why does the assembly instruction written in CCS always prompt error?: I just started learning DSP course, and I wrote the code according to the book, but I always get the error when writing in assembly, "TEXTxf.asm", ERROR! at line 15: [E0002] Invalid instruction for sp...; xwy0550123 DSP and ARM Processors

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components