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DG181BP

Description
DUAL 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP14
Categoryaccessories   
File Size78KB,9 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet View All

DG181BP Overview

DUAL 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP14

Semiconductor
DG181 thru DG191
High-Speed Drivers with JFET Switch
Description
The DG181 thru DG191 series of analog gates consist of 2
or 4 N-channel junction-type field-effect transistors (JFET)
designed to function as electronic switches. Level-shifting
drivers enable low-level inputs (0.8V to 2V) to control the
ON-OFF state of each switch. The driver is designed to
provide a turn-off speed which is faster than turn-on speed,
so that break-before-make action is achieved when
switching from one channel to another. In the ON state, each
switch conducts current equally well in both directions. In the
OFF condition, the switches will block voltages up to 20V
peak-to-peak. Switch-OFF input-output isolation 50dB at
10MHz, due to the low output impedance of the FET-gate
driving circuit.
CT
ODU ODUCT
R
PR
TE P
5
OLE TITUTE
S
April 1999
-504
OB
BS
9, HI 5151
E SU
I-504 IH
SIBL G185: H I-5051, IH5043
POS
,D
90,
3, H
Features
G184 : DG40 43, HI-03
D
90
DG1 91: HI-50
• Constant ON-Resistance for Signals to
±10V
(DG182,
DG1
DG185, DG188, DG191), to
±7.5V
(All Devices)
±15V
Power Supplies
• <2nA Leakage from Signal Channel in Both ON and
OFF States
• TTL, DTL, RTL Direct Drive Compatibility
• t
ON
, t
OFF
<150ns, Break-Before-Make Action
• Cross-Talk and Open Switch Isolation >50dB at 10MHz
(75Ω Load)
Functional Diagrams (Typical Channel)
DG186, DG187, DG188 - ONE AND TWO CHANNEL
SPDT AND SPST CIRCUIT CONFIGURATION
V
L
V+
DG183, DG184, DG185 - TWO CHANNEL DPST
CIRCUIT CONFIGURATION
V
L
V+
IN
S
1
D
1
IN
S
D
S
2
D
2
S
D
GND
V-
GND
V-
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
©
Harris Corporation 1999
File Number
3114.4
1

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