Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 235°C
(SOIC, Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
PARAMETER
RHEOSTAT MODE
Nominal
Resistance
Different Non Linearity
Integral Non Linearity
Rheostat Tempco (Note 1)
Wiper Resistance (Note 2)
VDD: 2.7V~5.5V; Temp: –40°C~85°C; Typical values: VDD = 5V and T = 25°C, Unless Otherwise Specified
SYMBOL
CONDITIONS
MIN.
TYP
MAX.
UNITS
R
DNL
INL
∆R
AB
/∆T
R
W
T = 25°C, V
W
open
-20
-1
-1
0.3
0.5
200
+20
+1
+1
%
LSB
LSB
ppm/°C
V
DD
= 5V, I = V
DD
/R
Total
V
DD
= 2.7V, I = V
DD
/R
Total
50
80
100
120
Ω
Ω
POTENTIOMETER MODE
Resolution (Note 1)
Different Non Linearity (Note 2)
Integral Non Linearity (Note 2)
Potentiometer Tempco (Note 1)
Full Scale Error
Zero Scale Error
RESISTOR TERMINAL
Voltage Range (Note 1)
Terminal Capacitance (Note 1)
Wiper Capacitance (Note 1)
DYNAMIC CHARACTERISTICS
1
BW
10K
Bandwidth -3dB
BW
50K
BW
100K
Settling Time to 1 LSB
ANALOG OUTPUT (BUFFER ENABLED)
Amp Output Current (Note 2)
Amp Output Resistance (Note 2)
Total Harmonic Distortion (Note 1)
DIGITAL INPUTS/OUTPUTS
Input High Voltage
Input Low Voltage
V
IH
V
IL
0.7V
DD
0.3V
DD
V
V
I
OUT
Rout
THD
V
A
= 2.5V, V
DD
= 5V, f = 1kHz, V
IN
= 1V
RMS
V
O
= 1/2 scale
3
1
10
0.08
%
mA
T
S
V
DD
= 5V, V
B
= V
SS
Code = Full Scale
Code = 80h
CL = 30pF
V
DD
= 5.5V = V
A
, V
B
= V
SS
1.5
300
200
80
100
MHz
kHz
kHz
µs
V
A
,V
B
,V
W
C
A
, C
B
V
SS
30
30
V
DD
V
pF
pF
N
DNL
INL
∆V
w
/∆T
V
FSE
V
ZSE
Code = 80h
Code = Full Scale
Code = Zero Scale
-1
0
8
-1
-1
+20
0
1
+1
+1
Bits
LSB
LSB
ppm/°C
LSB
LSB
4
ISL45022
Electrical Specifications
Output Low Voltage
Input Leakage Current
Output Leakage Current
Input Capacitance (Note 1)
Output Capacitance (Note 1)
POWER REQUIREMENTS
Operating Voltage (Note 1)
Operating Current
Operating Current
Standby Current
V
DD
I
DDR
I
DDW
I
SA
I
SB
(Note 2)
Power Supply Rejection Ratio
NOTES:
1. Not subject to production test.
2. Only on Final Test.
3. V
DD
= +2.7V to 5.5V, V
SS
= 0V, T = 25°C, unless otherwise noted.
PSRR
All ops except NVMEM program
During Non-volatile memory program
Buffer is active, no load
Buffer is inactive, Power Down, No load
V
DD
= 5V
±10%,
Code = 80h
0.5
0.1
2.7
1
1
5.5
1.8
2
1
1
1
V
mA
mA
mA
µA
LSB/V
VDD: 2.7V~5.5V; Temp: –40°C~85°C; Typical values: VDD = 5V and T = 25°C, Unless Otherwise Specified
V
OL
I
LI
I
Lo
C
IN
C
OUT
I
OL
= 2mA
CS = V
DD
, Vin = Vss ~ V
DD
CS = V
DD
, Vin = V
SS
~ V
DD
V
DD
= 5V, fc = 1MHz Code = 80h
V
DD
= 5V, fc = 1MHz
Code = 80h
-1
-1
25
25
0.4
+1
+1
V
µA
µA
pF
pF
Functional Description
The ISL45022 series, a family of 256-tap, nonvolatile
digitally programmable potentiometers is designed to
operate as both a potentiometer or a variable resistor
depending upon the output configuration selected.
The chip can store four 9-bit words in nonvolatile memory
(NVMEM0 ~ NVMEM3) and the word stored in the NVMEM0
will be used to set the tap register values when the device is
powered up.
The ISL45022 is controlled by a serial SPI interface that
allows setting tap register values as well as storing data in
the nonvolatile memory.
end point pins of the resistor (VA and VB) and the other
terminal is the wiper (VW) pin. This configuration controls the
resistance between the two terminals and the resistance can
be adjusted by sending the corresponding tap register
setting commands to the ISL45022 or loading a pre-set tap
register value from nonvolatile memory NVMEM0 ~
MVMEM3.
POTENTIOMETER CONFIGURATION
In potentiometer configuration an input voltage is connected
to one of the end point pins (VA or VB). The voltage on the
wiper pin will be proportional to the voltage difference
between VA and VB and the wiper setting. The resistance
cannot be directly measured in this configuration.
Potentiometer and Rheostat Modes
The ISL45022 can operate as either a rheostat or as a
potentiometer (voltage divider). When in the potentiometer
configuration there are two possible modes. One is without
the output buffer and the other mode is with the output
buffer. Selecting the mode is done by controlling bit D8 of
the data register. D8 = 0 sets the output buffer off and D8 = 1
sets it on. Each channel can be independently set to either
buffer On or Off.
Note that this bit can only be set by loading the value to
the NVMEM with instructions #5 and then loading the
TAP register with instruction #6 from NVMEM. This bit
cannot be controlled by directly writing the value to the
chip when the tap register is set.
RHEOSTAT CONFIGURATION
The ISL45022 acts as a two terminal resistive element in the
rheostat configuration where one terminal is either one of the
5
Programming Modes
Two program modes are available for the ISL45022:
1.
Direct program mode.
The tap register setting can be
changed either by loading a predetermined value from an
external microcontroller or by using the UP/DOWN
commands. The UP and DOWN commands change the
tap register setting incrementally i.e., 1 LSB at a time.
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