Freescale Semiconductor
Technical Data
Document Number: MC33999
Rev. 6.0, 2/2014
16-Output Switch with SPI
and PWM Control
The 33999 is a 16-output low-side switch with a 24-bit serial input
control. It is designed for a variety of applications including inductive,
incandescent, and LED loads. The Serial Peripheral Interface (SPI)
provides both input control and diagnostic readout. Eight parallel inputs
are also provided for direct Pulse Width Modulation (PWM) control of
eight dedicated outputs. Additionally, an output-programmable PWM
input provides PWM of any combination of outputs. A dedicated reset
input provides the ability to clear all internal registers and turn all
outputs off.
The 33999 directly interfaces with microcontrollers and is
compatible with both 3.3 V and 5.0 V CMOS logic levels. The 33999,
in effect, serves as a bus expander and buffer with fault management
features that reduces the MCU’s fault management burden. This
device is powered by SMARTMOS technology.
33999
POWER DUAL OCTAL SERIAL SWITCH WITH
SERIAL PERIPHERAL INTERFACE I/O
EK SUFFIX (PB-FREE)
98ASA10506D
54-PIN SOICW EXPOSED PAD
Features
• Designed to operate 5.0 V < V
PWR
< 27 V
• 24-Bit SPI for control and fault reporting, 3.3 V/5.0 V compatible
• Outputs Are Current Limited (0.9 A to 2.5 A) to Drive Incandescent
lamps
• Output voltage clamp of +50 V during inductive switching
• On/Off control of open load detect current (LED application)
• V
PWR
standby current < 10
A
• R
DS(on)
of 0.55
at 25 °C typical
• Independent overtemperature protection
• Output selectable for PWM control
• Output ON short-to-V
BAT
and OFF short-to-ground /open detection
• 54-Pin Exposed Pad Package for Thermal Performance
3.3 V/5.0 V
VDD
MCU
SCLK
CS
MISO
MOSI
PWM
RST
SCLK
CS
SI
SO
PWM
RST
PWM0
PWM1
PWM6
PWM7
PWM8
PWM9
PWM14
PWM15
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
GND
Applications
• Aircraft, automotive, and robotic systems
• Marine applications and farm equipment
• Actuator, small DC motor, LED and incandescent
lamp controls
• Other applications where low side switch control is
required
33999
VPWR
VPWR
VBAT
SOPWR
Solenoid/Relay
LED
Lamp
Figure 1. 33999 Simplified Application Diagram
© Freescale Semiconductor, Inc., 2007 - 2014. All rights reserved.
ORDERABLE PARTS
ORDERABLE PARTS
Table 1. Orderable Part Variations
Part Number
MCZ33999EK/R2
Temperature (T
A
)
-40 to 125 °C
Package
54 SOICW-EP
33999
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
V
PWR
V
DD
Overvoltage
Detect
OVD
VDD
RB
SFPDB
SFL
CS
SCLK
SI
SO
CSI
CSBI
8
V
DD
Bias
Gate
Control
OUT0
2
50 V
OUT1– OUT 15:
3, 6, 7, 21, 22,
25, 26, 29, 30,
33, 34, 48, 49,
52, 53
Voltage
Regulator
GE
OT
SF
OF
PWM
50
RST
47
CS
23
SCLK
20
SI
32
SO
35
SO
PWR
5
PWM0
1
PWM1
4
PWM6
24
PWM7
27
PWM8
28
PWM9
31
PWM14
51
PWM15
54
10
A
25
A
10
A
Input
Buffers
10
A
10
A
Serial D/O
Line Driver
To Gates
1 to 15
V
Ref
Open
Load
Detect
Enable
I
LIMIT
50
A
R
S
SPI
Interface
Logic
Short and
Open
Circuit
Detect
Overtemperature
Detect
GND Pins:
10 – 18
37 – 40
42 – 45
PWM0
10
A
PWM1
10
A
PWM6
10
A
PWM7
10
A
PWM8
10
A
PWM9
10
A
PWM14
10
A
PWM15
10
A
From Detectors 1 to 15
Figure 2. 33999 Simplified Internal Block Diagram
33999
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
PWM0
OUT0
OUT1
PWM1
SOPWR
OUT2
OUT3
VPWR
NC
NC
GND
GND
GND
GND
GND
GND
GND
NC
NC
SCLK
OUT4
OUT5
CS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
PWM15
OUT15
OUT14
PWM14
PWM
OUT13
OUT12
RST
PWM6
OUT6
OUT7
PWM7
NC
NC
GND
GND
GND
NC
GND
GND
GND
NC
NC
SO
OUT11
OUT10
SI
PWM9
OUT9
OUT8
PWM8
Figure 3. 33999 Pin Connections
Table 2. 33999 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 11.
Pin Number
1, 4, 24, 27, 28,
31, 51, 54
2, 3, 6, 7, 21, 22,
25, 26, 29, 30, 33,
34, 48, 49, 52, 53
5
8
9, 10, 18, 19, 36,
37, 41, 45, 46
11 –17, 38 – 40,
42 – 44
20
23
32
35
47
50
Pin
Name
PWM0, PWM1,
PWM6 – PWM9,
PWM14, PWM15
OUT0 – OUT15
Pin
Function
Input
Formal Name
PWMn Input
Definition
Parallel PWM control Input pins. Allows direct PWM control of
eight outputs.
Low-side driver outputs.
Output
Output 0 –
Output 15
SO
PWR
Supply
Battery Input
No Connect
Ground
System Clock
Chip Select
Serial Input
Serial Output
Reset
PWM Control Pin
SOPWR
VPWR
NC
GND
SCLK
CS
SI
SO
RST
PWM
Power
Input
N/C
Ground
Input
Input
Input
Output
Input
Input
Power supply pin to the SO output driver.
Battery supply input pin.
These pins have no connection.
Ground for logic, analog, and power output devices.
System Clock for internal shift registers of the 33999.
SPI control chip select input pin from MCU to 33999.
Serial data input pin to the 33999.
Serial data output pin.
Active low reset input pin.
PWM control input pin. Supports PWM on any combination of
outputs.
33999
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 3. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
ELECTRICAL RATINGS
VPWR Supply Voltage
(1)
SPI Interface Logic Supply Voltage
(1)
SPI Interface Logic Input Voltage (
CS
, PWM, SI, SO, SCLK,
RST
, PWMn)
(1)
Output Drain Voltage
Frequency of SPI Operation
(2)
Output Clamp Energy
(3)
ESD Voltage
(4)
Human Body Model
Machine Model
THERMAL RATINGS
Operating Temperature
Ambient
Junction
Case
Storage Temperature
Power Dissipation (T
A
½
25C)
(5)
Peak Package Reflow Temperature During Reflow
(6)
,
(7)
Thermal Resistance
Junction-to-Ambient
(8)
Junction- to-Lead
(9)
Junction-to-Flag
Notes
1.
2.
3.
4.
5.
6.
7.
R
JA
R
JL
R
JC
75
8.0
1.2
T
A
T
J
T
C
T
STG
P
D
T
PPRT
-40 to 125
-40 to 150
-40 to 125
-55 to 150
1.7
Note 7
V
ESD1
V
ESD2
±2000
±200
V
PWR
SO
PWR
V
IN
V
DS
-1.5 to 50
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 45
6.0
50
V
V
V
V
MHz
mJ
V
Symbol
Value
Unit
f
SPI
E
CLAMP
C
C
W
°C
C/W
Exceeding these limits may cause malfunction or permanent damage to the device.
This parameter is guaranteed by design but not production tested.
Maximum output clamp energy capability at 150°C junction temperature using single non-repetitive pulse method.
ESD data is available upon request. ESD testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
)
and the Machine Model (C
ZAP
= 200 pF, R
ZAP
= 0
).
Maximum power dissipation with no heat sink used.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
Tested per JEDEC test JESD52-2 (single-layer PWB).
Tested per JEDEC test JESD51-8 (two-layer PWB).
8.
9.
33999
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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