TWR-MCF51CN-KIT datasheet, PDF

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TWR-MCF51CN-KIT: Descriptionethernet development tools coldfire V1 ethernet kit; CategoryDevelopment board/suite/development tools; File Size2MB，50 Pages; ManufacturerFREESCALE (NXP); Environmental Compliance

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Freescale Semiconductor

Addendum

Document Number: QFN_Addendum

Rev. 0, 07/2014

Addendum for New QFN

Package Migration

This addendum provides the changes to the 98A case outline numbers for products covered in this book.

Case outlines were changed because of the migration from gold wire to copper wire in some packages. See

the table below for the old (gold wire) package versus the new (copper wire) package.

To view the new drawing, go to Freescale.com and search on the new 98A package number for your

device.

For more information about QFN package use, see EB806:

Electrical Connection Recommendations for

the Exposed Pad on QFN and DFN Packages.

•

includes precision trimming of internal reference, allowing 0.2% resolution and 2% deviation over temperature and

voltage. PLL derives a higher accuracy clock source derived by an external reference

System Protection

– Watchdog computer operating properly (COP) reset with option to run from dedicated 1-kHz internal clock source or bus

clock

– Low-voltage detection with reset or interrupt; selectable trip points

– Illegal opcode and illegal address detection with programmable reset or exception response

– Flash block protection

Development Support

– Single-wire background debug module (BDM) interface; supports same electrical interface used by the S08, 9S12, and

9S12x families debug modules

– 4 PC plus 2 address (optional data) breakpoint registers with programmable 1- or 2-level trigger response

– 64-entry processor status and debug data trace buffer with programmable start/stop conditions

Peripherals

– ADC—Up to 12 channel, 12-bit resolution; 2.5

μs

conversion time; automatic compare function; 1.7 mV/°C temperature

sensor; internal bandgap reference channel; operation in stop3; fully functional from 3.6 V to 1.8 V

– SCI—Three modules with optional 13-bit break

– SPI—Two interfaces with full-duplex or single-wire bi-directional; double-buffered transmit and receive; master or slave

mode; MSB-first or LSB-first shifting

– IIC—Two IICs with up to 100 kbps with maxmimum bus loading; multi-master operation; programmable slave address;

interrupt-driven byte-by-byte data transfer; supports broadcast mode and 11-bit addressing

– TPM—Two 3-channel, 16-bit resolution modules; selectable input capture, output compare, or buffered edge- or

center-aligned PWM on each channel

– RTC—8-bit modulus counter with binary- or decimal-based prescaler; external clock source for precise time base,

time-of-day, calendar- or task-scheduling functions; free-running on-chip low-power oscillator (1 kHz) for cyclic wake-up

without external components; runs in all MCU modes

– MTIM—Two 8-bit resolution modulo timers with 8-bit prescaler

Input/Output

– Up to 70 general-purpose input/output (GPIO) pins, all with pin mux controls to select alternate functions

– 16 keyboard interrupt (KBI) pins with selectable polarity

– Hysteresis and configurable pull-up device or input filtering on all input pins; configurable slew rate and drive strength on

all output pins

– 16 Rapid GPIO pins connected to the CPU’s high-speed local bus with set, clear, and toggle functionality (PTD and PTF)

MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4

Freescale Semiconductor

Table of Contents

MCF51CN128 Series Comparison . . . . . . . . . . . . . . . . . . . . . .4

1.1 Device Comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

1.2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . .12

3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .12

3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .13

3.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . .14

3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

3.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .18

3.8 External Oscillator (XOSC) Characteristics . . . . . . . . .20

3.9 Multipurpose Clock Generator (MCG) Specifications . .21

3.10 Mini-FlexBus Timing Specifications . . . . . . . . . . . . . . .23

3.11 Fast Ethernet Timing Specifications . . . . . . . . . . . . . . .24

3.11.1 Receive Signal Timing Specifications . . . . . . . .24

3.11.2 Transmit Signal Timing Specifications . . . . . . . .25

3.11.3 Asynchronous Input Signal Timing Specifications25

3.11.4 MII Serial Management Timing Specifications .26

3.12 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

3.12.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . .26

3.12.2 TPM Module Timing . . . . . . . . . . . . . . . . . . . . .28

3.12.3 SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

3.12.4 ADC Characteristics . . . . . . . . . . . . . . . . . . . . .32

3.12.5 Flash Specifications. . . . . . . . . . . . . . . . . . . . . .35

3.13 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

3.13.1 Radiated Emissions . . . . . . . . . . . . . . . . . . . . . .36

Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Mechanical Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . .36

6.1 80-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

6.2 64-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40

6.3 48-pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47

Table 13..Receive Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 14..Transmit Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 15..MII Transmit Signal Timing . . . . . . . . . . . . . . . . . . . . . 25

Table 16..MII Serial Management Channel Signal Timing . . . . . 26

Table 17..Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 18..TPM Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 19..SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 20..12-bit ADC Operating Conditions . . . . . . . . . . . . . . . . 32

Table 21..12-bit ADC Characteristics (V

REFH

= V

DDAD

, V

REFL

SSAD

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 22..Flash Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 23..Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 24..Package Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 25..Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

List of Figures

Figure 1..MCF51CN128 Series Block Diagram . . . . . . . . . . . . . . 5

Figure 2..Pin Assignments in 80-Pin LQFP Package. . . . . . . . . . 6

Figure 3..Pin Assignments in 64-Pin LQFP Package. . . . . . . . . . 7

Figure 4..Pin Assignments in 48-Pin QFN Package. . . . . . . . . . . 8

Figure 5..Pull-up and Pull-down Typical Resistor Values . . . . . . 16

Figure 6..Typical Low-Side Driver (Sink) Characteristics — Low Drive

(PTxDSn = 0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 7..Typical Low-Side Driver (Sink) Characteristics — High

Drive (PTxDSn = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 8..Typical High-Side (Source) Characteristics — Low Drive

(PTxDSn = 0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 9..Typical High-Side (Source) Characteristics — High Drive

(PTxDSn = 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 10..Typical Run I

for FBE and FEI, I

vs. V

(ADC off, All Other Modules Enabled) . . . . . . . . . . . . . 19

Figure 11..Typical Crystal or Resonator Circuit: High Range and Low

Range/High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 12..Typical Crystal or Resonator Circuit: Low Range/Low

Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 13..Mini-FlexBus Read Timing . . . . . . . . . . . . . . . . . . . . 23

Figure 14..Mini-FlexBus Write Timing . . . . . . . . . . . . . . . . . . . . 24

Figure 15..MII Receive Signal Timing Diagram . . . . . . . . . . . . . 25

Figure 16..MII Transmit Signal Timing Diagram . . . . . . . . . . . . . 25

Figure 17..MII Async Inputs Timing Diagram . . . . . . . . . . . . . . . 25

Figure 18..MII Serial Management Channel TIming Diagram . . 26

Figure 19..Reset Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 20..IRQ/KBIPx Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 21..Timer External Clock. . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 22..Timer Input Capture Pulse . . . . . . . . . . . . . . . . . . . . 28

Figure 23..SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . 30

Figure 24..SPI Master Timing (CPHA =1) . . . . . . . . . . . . . . . . . 30

Figure 25..SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . 31

Figure 26..SPI Slave Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . 31

Figure 27..ADC Input Impedance Equivalency Diagram . . . . . . 33

List of Tables

Table 1.. MCF51CN128 Series Device Comparison . . . . . . . . . . .4

Table 2.. Package Pin Assignments . . . . . . . . . . . . . . . . . . . . . . .8

Table 3.. Parameter Classifications . . . . . . . . . . . . . . . . . . . . . . .12

Table 4.. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .12

Table 5.. Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .13

Table 6.. ESD and Latch-up Test Conditions . . . . . . . . . . . . . . . .14

Table 7.. ESD and Latch-Up Protection Characteristics . . . . . . .14

Table 8.. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

Table 9.. Supply Current Characteristics . . . . . . . . . . . . . . . . . . .18

Table 10..XOSC and ICS Specifications (Temperature Range = –40

to 85

°C

Ambient) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Table 11..MCG Frequency Specifications (Temperature Range = –40

to 125

°C

Ambient) . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Table 12..Mini-FlexBus AC Timing Specifications . . . . . . . . . . . .23

MCF51CN128 ColdFire Microcontroller Advance Information Data Sheet, Rev. 4

Freescale Semiconductor

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