www.fairchildsemi.com
KA3843AC
SMPS Controller
Features
•
•
•
•
•
•
•
Low start current 0.2mA (typ)
Operating range up to 500kHz
Cycle by cycle current limiting
Under voltage lock out with hysteresis
Short shutdown delay time: typ.100ns
High current totem-pole output
Output swing limiting: 22V
Description
The KA3843AC are fixed PWM controller for Off-Line and
DC to DC converter applications. The internal circuits
include UVLO, low start up current circuit, temperature
compensated reference, high gain error amplifier, current
sensing comparator, and high current totem-pole output for
driving a POWER MOSFET. Also KA3843AC provide low
start up current below 0.3mA and short shutdown delay
time typ. 100ns. The KA3843AC is 8.4V(on) and 7.6V(off).
The KA3843AC can operate within 100% duty cycle.
8-DIP
1
8-SOP
1
Internal Block Diagram
7
V
CC
29V
V
REF
8
Internal
Bias
1/2V
REF
5V
V
REF
SET/
RESET
UVLO
5
GND
Good LOGIC
7
Error Amp
+
-
C.S
PWM
Comp. LATCH
1/3
1V
S
R
22V
6
OUTPUT
PWR
V
C
V
FB
2
COMP
1
5
PWR
C.S
3
R
T
/C
T
4
T
GND
OSCILLATOR
Rev. 1.0.1
©2005 Fairchild Semiconductor Corporation
KA3843AC
Absolute Maximum Ratings
Parameter
Supply voltage
Output current
Analog inputs (pin2, 3)
Error amp. output sink current
Power dissipation
Symbol
V
CC
I
O
V
I(ANA)
I
SINK(EA)
P
D
Value
30
+1
-0.3 to 6.3
10
1
Unit
V
A
V
mA
W
Electrical Characteristics
(V
CC
= 15V, R
T
= 10KW, C
T
= 3.3nF, T
A
= 0°C to +70°C ,Unless otherwise specified)
Parameter
REFERENCE SECTION
Output voltage
Line regulation
Load regulation
Output short circuit
OSILLATOR SECTION
Initial accuracy
Voltage stability
Amplitude
Discharge current
CURRENT SENSE SECTION
Gain
Maximum input signal
PSRR
Input bias current
Delay to output
G
V
V
I(MAX)
PSRR
I
BIAS
T
D
(Note2, 3)
V
PIN1
= 5V(Note2)
V
CC
= 12V to 25V (Note1, 2)
V
SENSE
=0V
V
PIN3
= 0 V to 2V (Note1)
2.85
0.9
-
-
-
3
1.0
70
-2
100
3.15
1.1
-
-10
200
V/V
V
dB
uA
ns
F
OSC
ST
V
V
OSC
I
DISCHG
T
J
= 25°C
V
CC
= 12V to 25V
V
PIN4
, peak to peak
T
J
= 25°C
47
-
-
7.8
52
0.2
1.7
8.3
57
1
-
8.8
kHz
%
V
mA
V
REF
R
Line
R
LOAD
I
SC
T
J
= 25°C, I
O
= 1mA
V
CC
= 12V to 25V
I
O
= 1mA to 20mA
T
a
= 25°C
4.9
-
-
-
5.0
6
6
-100
5.1
20
25
-180
V
mV
mV
mA
Symbol
Conditions
Min.
Typ.
Max.
Unit
Notes:
1. These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with V
FB
= 0V.
∆V
COMP
-
3. Gain defined as: G
V
= ------------------------ ;
O
≤
V
SENSE
≤
0.8V
∆V
SENSE
2
KA3843AC
Electrical Characteristics
(Continued)
(V
CC
= 15V, R
T
= 10KW, C
T
= 3.3nF, T
A
= 0°C to +70°C, Unless otherwise specified)
Parameter
ERROR AMPLIFIER SECTION
Input voltage
Input bias current
Open loop gain
Unity gain bandwidth
PSRR
Output sink current
Output source current
Output high voltage
Output low voltage
OUTPUT SECTION
Output Low Level
Output high level
Rise time
Fall time
Output voltage swing limit
V
OL
V
OH
t
R
t
F
V
OLIM
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
T
J
= 25°C, C1 = 1nF (Note1)
T
J
= 25°C, C1 = 1nF (Note1)
V
CC
= 27V, C1 = 1nF
KA3882E
KA3883E
KA3882E
KA3883E
KA3882E/KA3883E
-
-
V
PIN2
= V
PIN3
= 0V
I
CC
= 25mA
-
-
13
12
-
-
-
15
7.8
9
7.0
94
-
-
-
-
0.1
1.5
13.5
13.5
40
40
22
16
8.4
10
7.6
96
-
0.2
11
29
0.4
2.2
-
-
100
100
-
17
9.0
11
8.2
100
0
0.4
17
-
V
V
V
V
ns
ns
V
V
V
V
V
%
%
mA
mA
V
V
I
I
BIAS
G
VO
GBW
PSRR
I
SINK
I
SOURCE
V
OH
V
OL
V
PIN1
= 2.5V
V
FB
=0V
V
O
= 2V to 4V (Note1)
T
J
= 25°C (Note1)
V
CC
= 12V to 25V (Note1)
V
PIN2
= 2.7V, V
PIN1
= 1.1V
V
PIN2
= 2.3V, V
PIN1
= 5.0V
V
PIN2
= 2.3V
R1 = 15KΩ to GND
V
PIN2
= 2.7V
R1 = 15kΩ to Vref
2.42
-
65
0.7
60
2
-0.5
5
-
2.50
-0.3
90
1
70
6
-0.8
6
0.7
2.58
-2
-
-
-
-
-
-
1.1
V
uA
dB
MHz
dB
mA
mA
V
V
Symbol
Conditions
Min.
Typ.
Max.
Unit
UNDER VOLTAGE LOCKOUT SECTION
Start threshold
Min. operating voltage
( after turn on )
PWM SECTION
Maximum duty cycle
Minimum duty cycle
TOTAL STANDBY CURRENT
Start-up current
Operating supply current
V
CC
zener voltage
I
ST
I
CC
V
Z
D
MAX
D
MIN
V
TH
V
TL
* Adjust V
CC
above the start threshold before setting at 15V
Notes :
1. These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with V
FB
= 0V.
∆V
COMP
-
3. Gain defined as: G
V
= ------------------------ ;
O
≤
V
SENSE
≤
0.8V
∆V
SENSE
3
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