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8N0QV01AG-0148CD

Description
LVCMOS Output Clock Oscillator
CategoryPassive components    oscillator   
File Size925KB,18 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

8N0QV01AG-0148CD Overview

LVCMOS Output Clock Oscillator

8N0QV01AG-0148CD Parametric

Parameter NameAttribute value
Minimum operating temperature
Maximum operating temperature70 °C
physical size7.0mm x 5.0mm x 1.5mm
Is SamacsysN
YTEOL0
Objectid1327889577
Reach Compliance CodeCompliant
Is it lead-free?Yes
Is it Rohs certified?Yes
Minimum control voltage
Frequency Adjustment - MechanicalNO
linearity5%
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
maximum symmetry50/50 %
Other featuresENABLE/DISABLE FUNCTION
Maximum control voltage3.3 V
Frequency offset/pull rate727.5 ppm
frequency stability100%
Maximum operating frequency260 MHz
Minimum operating frequency15.476 MHz
Oscillator typeLVCMOS
Output load50 OHM
Nominal supply voltage3.3 V
JESD-609 codee3
Installation featuresSURFACE MOUNT
Number of terminals6
Package body materialCERAMIC
Encapsulate equivalent codeDILCC6,.2
surface mountYES
Terminal surfaceMatte Tin (Sn)
Quad-Frequency Programmable
VCXO
IDT8N0QV01 Rev G
Preliminary Data Sheet
General Description
The 8N0QV01 is a Quad-Frequency Programmable VCXO with very
flexible frequency and pull-range programming capabilities. The
device uses IDT’s Fourth Generation FemtoClock® NG technology
for an optimum of high clock frequency and low phase noise
performance (0.75ps, RMS 12kHz - 20MHz). The device accepts
2.5V or 3.3V supply and is packaged in a small, lead-free (RoHS 6)
10-lead ceramic 5mm x 7mm x 1.55mm package.
Besides the four default power-up frequencies set by the FSEL0
and FSEL1 pins, the 8N0QV01 can be programmed via the I
2
C
interface to any output clock frequency between 15.476MHz to
260MHz to a very high degree of precision with a frequency step
size of 435.9Hz ÷N (N: PLL post divider). Since the FSEL0 and
FSEL1 pins are mapped to four independent PLL, P, M and N
divider registers (P, MINT, MFRAC and N), reprogramming those
registers to other frequencies under control of FSEL0 and FSEL1 is
supported. The extended temperature range supports wireless
infrastructure, telecommunication and networking end equipment
requirements.
Features
Fourth generation FemtoClock® NG technology
Programmable clock output frequency from 15.476MHz to
260MHz
Four power-up default frequencies (see part number order
codes), re-programmable by I
2
C
I
2
C programming interface for the output clock frequency, APR
and internal PLL control registers
Frequency programming resolution is 435.9Hz ÷N
Absolute pull-range (APR) programmable from ±2.5 to
±727.5ppm
One 2.5V, 3.3V LVCMOS clock output
Two control inputs for the power-up default frequency
LVCMOS/LVTTL compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 0.75ps
(typical)
RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 1ps (typical)
2.5V or 3.3V supply voltage modes
-40°C to 85°C ambient operating temperature
Available in Lead-free (RoHS 6) package
Block Diagram
OSC
114.285 MHz
÷MINT,
MFRAC
2
VC
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pin Assignment
÷P
PFD
&
LPF
FemtoClock® NG
VCO
1950-2600MHz
÷N
Q
VC 1
OE 2
GND 3
FSEL0 4
FSEL1 5
10 SCLK
9 SDATA
8 V
DD
7 DNU
6 Q
A/D
7
25
Configuration Register (ROM)
(Frequency, APR, Polarity)
I
2
C Control
7
IDT8N0QV01 Rev G
10-lead ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice
IDT8N0QV01GCD
REVSION A APRIL 11, 2012
1
©2012 Integrated Device Technology, Inc.
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