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5962R9578401VXC

Description
HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16
Categorylogic    logic   
File Size170KB,9 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

5962R9578401VXC Overview

HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16

5962R9578401VXC Parametric

Parameter NameAttribute value
Parts packaging codeDFP
package instructionDFP, FL16,.3
Contacts16
Reach Compliance Codecompliant
seriesHC/UH
JESD-30 codeR-CDFP-F16
JESD-609 codee4
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-KBAR FLIP-FLOP
MaximumI(ol)0.004 A
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL16,.3
Package shapeRECTANGULAR
Package formFLATPACK
power supply5 V
Prop。Delay @ Nom-Sup35 ns
propagation delay (tpd)35 ns
Certification statusNot Qualified
Filter level38535V;38534K;883S
Maximum seat height2.92 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
total dose100k Rad(Si) V
Trigger typePOSITIVE EDGE
width6.73 mm
Base Number Matches1
HCS109MS
September 1995
Radiation Hardened
Dual JK Flip Flop
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
R1
J1
K1
CP1
S1
Q1
Q1
GND
1
2
3
4
5
6
7
8
16 VCC
15 R2
14 J2
13 K2
12 CP2
11 S2
10 Q2
9 Q2
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Cosmic Ray Upset Immunity < 2 x 10
(Typ)
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
5µA at VOL, VOH
-9
Errors/Bit-Day
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
R1
J1
K1
CP1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
R2
J2
K2
CP2
S2
Q2
Q2
Description
The Intersil HCS109MS is a Radiation Hardened Dual JK
Flip Flop with set and reset. The flip flop changes state with
the positive transition of the clock (CP1 or CP2).
The HCS109MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS109MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
S1
Q1
Q1
GND
Ordering Information
PART NUMBER
HCS109DMSR
HCS109KMSR
HCS109D/Sample
HCS109K/Sample
HCS109HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
103
518748
2466.2

5962R9578401VXC Related Products

5962R9578401VXC 5962R9578401VEC
Description HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16 HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, METAL SEALED, SIDE BRAZED, CERAMIC, DIP-16
Parts packaging code DFP DIP
package instruction DFP, FL16,.3 DIP, DIP16,.3
Contacts 16 16
Reach Compliance Code compliant compliant
series HC/UH HC/UH
JESD-30 code R-CDFP-F16 R-CDIP-T16
JESD-609 code e4 e4
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type J-KBAR FLIP-FLOP J-KBAR FLIP-FLOP
MaximumI(ol) 0.004 A 0.004 A
Number of digits 2 2
Number of functions 2 2
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity COMPLEMENTARY COMPLEMENTARY
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DFP DIP
Encapsulate equivalent code FL16,.3 DIP16,.3
Package shape RECTANGULAR RECTANGULAR
Package form FLATPACK IN-LINE
power supply 5 V 5 V
Prop。Delay @ Nom-Sup 35 ns 35 ns
propagation delay (tpd) 35 ns 35 ns
Certification status Not Qualified Not Qualified
Filter level 38535V;38534K;883S 38535V;38534K;883S
Maximum seat height 2.92 mm 5.08 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES NO
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface GOLD GOLD
Terminal form FLAT THROUGH-HOLE
Terminal pitch 1.27 mm 2.54 mm
Terminal location DUAL DUAL
total dose 100k Rad(Si) V 100k Rad(Si) V
Trigger type POSITIVE EDGE POSITIVE EDGE
width 6.73 mm 7.62 mm
Base Number Matches 1 1
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