530CC33M8688DG datasheet, PDF - EEWORLD Datasheet

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530CC33M8688DG: DescriptionCMOS Output Clock Oscillator, 33.8688MHz Nom, ROHS COMPLIANT PACKAGE-6; CategoryPassive components oscillator; File Size127KB，12 Pages; ManufacturerSkyworks; Websitehttp://www.skyworksinc.com; Environmental Compliance

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530CC33M8688DG Overview

CMOS Output Clock Oscillator, 33.8688MHz Nom, ROHS COMPLIANT PACKAGE-6

530CC33M8688DG Parametric

Parameter Name	Attribute value
Output load	15 pF
Nominal supply voltage	3.3 V
frequency stability	7%
Nominal operating frequency	33.8688 MHz
Oscillator type	CMOS
JESD-609 code	e4
Installation features	SURFACE MOUNT
Number of terminals	6
surface mount	YES
Terminal surface	Gold (Au) - with Nickel (Ni) barrier
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
physical size	7.0mm x 5.0mm x 1.85mm
Is it Rohs certified?	Yes
Objectid	4037675371
package instruction	ROHS COMPLIANT PACKAGE-6
Reach Compliance Code	Compliant
Is Samacsys	N
YTEOL	6.38
Other features	TRI-STATE; OUTPUT ENABLE FUNCTION; TRAY
Frequency Adjustment - Mechanical	NO
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
maximum symmetry	55/45 %

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S i 5 3 0 / 5 31

EVISION

R YS TA L

SCILLATOR

(XO) (10 M H

Features



1 . 4 GH

)

Available with any-rate output



frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz



3rd generation DSPLL

with superior



jitter performance



3x better frequency stability than



SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout



Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications



SONET/SDH



Networking



SD/HD video



Test and measurement



Clock and data recovery



FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

GND

CLK+

Si530 (LVDS/LVPECL/CML)

Functional Block Diagram

CLK– CLK+

GND

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

CLK–

GND

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.4 5/13

Si530/531

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