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K9F1G08D0M-YCB00

Description
Flash, 128MX8, 30ns, PDSO48, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48
Categorystorage    storage   
File Size729KB,40 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K9F1G08D0M-YCB00 Overview

Flash, 128MX8, 30ns, PDSO48, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48

K9F1G08D0M-YCB00 Parametric

Parameter NameAttribute value
MakerSAMSUNG
Parts packaging codeTSOP1
package instructionTSOP1,
Contacts48
Reach Compliance Codeunknown
ECCN code3A991.B.1.A
Maximum access time30 ns
Other featuresCONTAINS ADDITIONAL 32M BIT SPARE MEMORY
JESD-30 codeR-PDSO-G48
length18.4 mm
memory density1073741824 bit
Memory IC TypeFLASH
memory width8
Number of functions1
Number of terminals48
word count134217728 words
character code128000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128MX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Programming voltage2.7 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2.9 V
Minimum supply voltage (Vsup)2.4 V
Nominal supply voltage (Vsup)2.65 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
typeSLC NAND TYPE
width12 mm
Base Number Matches1
K9F1G08Q0M K9F1G16Q0M
K9F1G08D0M K9F1G16D0M
K9F1G08U0M K9F1G16U0M
FLASH MEMORY
Document Title
128M x 8 Bit / 64M x 16 Bit
NAND Flash Memory
Revision History
Revision No
0.0
0.1
History
1. Initial issue
1. Iol(R/B) of 1.8V is changed.
- min. value : 7mA --> 3mA
- Typ. value : 8mA --> 4mA
2. AC parameter is changed.
tRP(min.) : 30ns --> 25ns
3. A recovery time of minimum 1µs is required before internal circuit gets
ready for any command sequences as shown in Figure 17.
---> A recovery time of minimum 10µs is required before internal circuit gets
ready for any command sequences as shown in Figure 17.
Draft Date
July. 5. 2001
Nov. 5. 2001
Remark
Advance
Dec. 4. 2001
0.2
1. ALE status fault in ’
Random data out in a page’ timing diagram(page 19)
is fixed.
1. tAR1, tAR2 are merged to tAR.(Page11)
(Before revision) min. tAR1 = 10ns , min. tAR2 = 50ns
(After revision) min. tAR = 10ns
2. min. tCLR is changed from 50ns to 10ns.(Page11)
3. min. tREA is changed from 35ns to 30ns.(Page11)
4. min. tWC is changed from 50ns to 45ns.(Page11)
5. tRHZ is devided into tRHZ and tOH.(Page11)
- tRHZ : RE High to Output Hi-Z
- tOH : RE High to Output Hold
6. tCHZ is devided into tCHZ and tOH.(Page11)
- tCHZ : CE High to Output Hi-Z
- tOH : CE High to Output Hold
1. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 35)
2. Add the data protection Vcc guidence for 1.8V device - below about
1.1V. (Page 36)
1. The min. Vcc value 1.8V devices is changed.
K9F1GXXQ0M : Vcc 1.65V~1.95V --> 1.70V~1.95V
Pb-free Package is added.
K9F1G08U0M-FCB0,FIB0
K9F1G08Q0M-PCB0,PIB0
K9F1G08U0M-PCB0,PIB0
K9F1G16U0M-PCB0,PIB0
K9F1G16Q0M-PCB0,PIB0
Apr. 25. 2002
0.3
0.4
Nov. 22.2002
0.5
Mar. 6.2003
0.6
Mar. 13.2003
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the
right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you
have any questions, please contact the SAMSUNG branch office near your office.
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