MT41K256M16HA-125 M AIT:E TR datasheet, PDF

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MT41K256M16HA-125 M AIT:E TR: DescriptionSDRAM - DDR3L 存储器 IC 4Gb（256M x 16）并联 800 MHz 13.75 ns 96-FBGA（9x14）; Categorysemiconductor memory; File Size3MB，217 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT41K256M16HA-125 M AIT:E TR Overview

SDRAM - DDR3L 存储器 IC 4Gb（256M x 16）并联 800 MHz 13.75 ns 96-FBGA（9x14）

MT41K256M16HA-125 M AIT:E TR Parametric

Parameter Name	Attribute value
category
Maker	Micron Technology
series	Automotive, AEC-Q100
Package	Tape and Reel (TR)
memory type	Volatile
memory format	DRAM
technology	SDRAM - DDR3L
storage	4Gb（256M x 16）
memory interface	in parallel
Write cycle time - words, pages	-
Voltage - Power supply	1.283V ~ 1.45V
Operating temperature	-40°C ~ 95°C（TC）
Installation type	surface mount type
Package/casing	96-TFBGA
Supplier device packaging	96-FBGA（9x14）
Clock frequency	800 MHz
interview time	13.75 ns
Basic product number	MT41K256M16

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4Gb: x4, x8, x16 DDR3L SDRAM

Description

DDR3L SDRAM

MT41K1G4 – 128 Meg x 4 x 8 banks

MT41K512M8 – 64 Meg x 8 x 8 banks

MT41K256M16 – 32 Meg x 16 x 8 banks

Description

DDR3L SDRAM (1.35V) is a low voltage version of the

DDR3 (1.5V) SDRAM. Refer to DDR3 (1.5V) SDRAM

(Die Rev :E) data sheet specifications when running in

1.5V compatible mode.

•

Self refresh temperature (SRT)

Automatic self refresh (ASR)

Write leveling

Multipurpose register

Output driver calibration

Features

• V

= V

DDQ

= 1.35V (1.283–1.45V)

• Backward compatible to V

= V

DDQ

= 1.5V ±0.075V

– Supports DDR3L devices to be backward com-

patible in 1.5V applications

• Differential bidirectional data strobe

• 8n-bit prefetch architecture

• Differential clock inputs (CK, CK#)

• 8 internal banks

• Nominal and dynamic on-die termination (ODT)

for data, strobe, and mask signals

• Programmable CAS (READ) latency (CL)

• Programmable posted CAS additive latency (AL)

• Programmable CAS (WRITE) latency (CWL)

• Fixed burst length (BL) of 8 and burst chop (BC) of 4

(via the mode register set [MRS])

• Selectable BC4 or BL8 on-the-fly (OTF)

• Self refresh mode

• T

of 105°C

– 64ms, 8192-cycle refresh up to 85°C

– 32ms, 8192-cycle refresh at >85°C to 95°C

– 16ms, 8192-cycle refresh at >95°C to 105°C

Options

• Configuration

– 1 Gig x 4

– 512 Meg x 8

– 256 Meg x 16

• FBGA package (Pb-free) – x4, x8

– 78-ball (9mm x 10.5mm) Rev. E

– 78-ball (7.5mm x 10.6mm) Rev. N

– 78-ball (8mm x 10.5mm) Rev. P

• FBGA package (Pb-free) – x16

– 96-ball (9mm x 14mm) Rev. E

– 96-ball (7.5mm x 13.5mm) Rev. N

– 96-ball (8mm x 14mm) Rev. P

• Timing – cycle time

– 938ps @ CL = 14 (DDR3-2133)

– 1.07ns @ CL = 13 (DDR3-1866)

– 1.25ns @ CL = 11 (DDR3-1600)

• Operating temperature

– Commercial (0°C T

+95°C)

– Industrial (–40°C T

+95°C)

– Automotive (–40°C T

+105°C)

• Revision

Marking

1G4

512M8

256M16

-093

-107

-125

None

:E/:N/:P

Table 1: Key Timing Parameters

Speed Grade

-093

1, 2

-107

-125

Notes:

Data Rate (MT/s)

2133

1866

1600

Target

RCD-

RP-CL

14-14-14

13-13-13

11-11-11

RCD

(ns)

CL (ns)

13.09

13.91

13.75

13.09

13.91

13.75

13.09

13.91

13.75

1. Backward compatible to 1600, CL = 11 (-125).

2. Backward compatible to 1866, CL = 13 (-107).

09005aef85af8fa8

4Gb_DDR3L.pdf - Rev. Q 12/17 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

4Gb: x4, x8, x16 DDR3L SDRAM

Description

Contents

State Diagram ................................................................................................................................................ 11

Functional Description ................................................................................................................................... 12

Industrial Temperature ............................................................................................................................... 12

Automotive Temperature ............................................................................................................................ 12

General Notes ............................................................................................................................................ 13

Functional Block Diagrams ............................................................................................................................. 14

Ball Assignments and Descriptions ................................................................................................................. 16

Package Dimensions ....................................................................................................................................... 22

Electrical Specifications .................................................................................................................................. 28

Absolute Ratings ......................................................................................................................................... 28

Input/Output Capacitance .......................................................................................................................... 29

Thermal Characteristics .................................................................................................................................. 30

Electrical Specifications – I

Specifications and Conditions ............................................................................ 32

Electrical Characteristics – Operating I

Specifications .................................................................................. 43

Electrical Specifications – DC and AC .............................................................................................................. 48

DC Operating Conditions ........................................................................................................................... 48

Input Operating Conditions ........................................................................................................................ 49

DDR3L 1.35V AC Overshoot/Undershoot Specification ................................................................................ 53

DDR3L 1.35V Slew Rate Definitions for Single-Ended Input Signals .............................................................. 56

DDR3L 1.35V Slew Rate Definitions for Differential Input Signals ................................................................. 58

ODT Characteristics ....................................................................................................................................... 59

1.35V ODT Resistors ................................................................................................................................... 60

ODT Sensitivity .......................................................................................................................................... 61

ODT Timing Definitions ............................................................................................................................. 61

Output Driver Impedance ............................................................................................................................... 65

34 Ohm Output Driver Impedance .............................................................................................................. 66

DDR3L 34 Ohm Driver ................................................................................................................................ 67

DDR3L 34 Ohm Output Driver Sensitivity .................................................................................................... 68

DDR3L Alternative 40 Ohm Driver ............................................................................................................... 69

DDR3L 40 Ohm Output Driver Sensitivity .................................................................................................... 69

Output Characteristics and Operating Conditions ............................................................................................ 71

Reference Output Load ............................................................................................................................... 74

Slew Rate Definitions for Single-Ended Output Signals ................................................................................. 74

Slew Rate Definitions for Differential Output Signals .................................................................................... 76

Speed Bin Tables ............................................................................................................................................ 77

Electrical Characteristics and AC Operating Conditions ................................................................................... 82

Command and Address Setup, Hold, and Derating .......................................................................................... 102

Data Setup, Hold, and Derating ...................................................................................................................... 109

Commands – Truth Tables ............................................................................................................................. 117

Commands ................................................................................................................................................... 120

DESELECT ................................................................................................................................................ 120

NO OPERATION ........................................................................................................................................ 120

ZQ CALIBRATION LONG ........................................................................................................................... 120

ZQ CALIBRATION SHORT .......................................................................................................................... 120

ACTIVATE ................................................................................................................................................. 120

READ ........................................................................................................................................................ 120

WRITE ...................................................................................................................................................... 121

PRECHARGE ............................................................................................................................................. 122

REFRESH .................................................................................................................................................. 122

SELF REFRESH .......................................................................................................................................... 123

09005aef85af8fa8

4Gb_DDR3L.pdf - Rev. Q 12/17 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

4Gb: x4, x8, x16 DDR3L SDRAM

Description

DLL Disable Mode ..................................................................................................................................... 124

Input Clock Frequency Change ...................................................................................................................... 128

Write Leveling ............................................................................................................................................... 130

Write Leveling Procedure ........................................................................................................................... 132

Write Leveling Mode Exit Procedure ........................................................................................................... 134

Initialization ................................................................................................................................................. 135

Voltage Initialization / Change ....................................................................................................................... 137

Voltage Switching ............................................................................................................................... 138

Mode Registers .............................................................................................................................................. 139

Mode Register 0 (MR0) ................................................................................................................................... 140

Burst Length ............................................................................................................................................. 140

Burst Type ................................................................................................................................................. 141

DLL RESET ................................................................................................................................................ 142

Write Recovery .......................................................................................................................................... 143

Precharge Power-Down (Precharge PD) ...................................................................................................... 143

CAS Latency (CL) ....................................................................................................................................... 143

Mode Register 1 (MR1) ................................................................................................................................... 145

DLL Enable/DLL Disable ........................................................................................................................... 145

Output Drive Strength ............................................................................................................................... 146

OUTPUT ENABLE/DISABLE ...................................................................................................................... 146

TDQS Enable ............................................................................................................................................. 146

On-Die Termination .................................................................................................................................. 147

WRITE LEVELING ..................................................................................................................................... 147

POSTED CAS ADDITIVE Latency ................................................................................................................ 147

Mode Register 2 (MR2) ................................................................................................................................... 148

CAS Write Latency (CWL) ........................................................................................................................... 149

AUTO SELF REFRESH (ASR) ....................................................................................................................... 149

SELF REFRESH TEMPERATURE (SRT) ........................................................................................................ 149

SRT vs. ASR ............................................................................................................................................... 150

DYNAMIC ODT ......................................................................................................................................... 150

Mode Register 3 (MR3) ................................................................................................................................... 150

MULTIPURPOSE REGISTER (MPR) ............................................................................................................ 151

MPR Functional Description ...................................................................................................................... 152

MPR Register Address Definitions and Bursting Order ................................................................................. 153

MPR Read Predefined Pattern .................................................................................................................... 158

MODE REGISTER SET (MRS) Command ........................................................................................................ 158

ZQ CALIBRATION Operation ......................................................................................................................... 159

ACTIVATE Operation ..................................................................................................................................... 160

READ Operation ............................................................................................................................................ 162

WRITE Operation .......................................................................................................................................... 173

DQ Input Timing ....................................................................................................................................... 181

PRECHARGE Operation ................................................................................................................................. 183

SELF REFRESH Operation .............................................................................................................................. 183

Extended Temperature Usage ........................................................................................................................ 185

Power-Down Mode ........................................................................................................................................ 186

RESET Operation ........................................................................................................................................... 194

On-Die Termination (ODT) ............................................................................................................................ 196

Functional Representation of ODT ............................................................................................................. 196

Nominal ODT ............................................................................................................................................ 196

Dynamic ODT ............................................................................................................................................... 198

Dynamic ODT Special Use Case ................................................................................................................. 198

Functional Description .............................................................................................................................. 198

09005aef85af8fa8

4Gb_DDR3L.pdf - Rev. Q 12/17 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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