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MT47H128M16RT-25E IT:C

Description
SDRAM - DDR2 存储器 IC 2Gb 并联 400 MHz 400 ps 84-FBGA(9x12.5)
Categorysemiconductor    memory   
File Size2MB,135 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Environmental Compliance
Download Datasheet Parametric View All

MT47H128M16RT-25E IT:C Overview

SDRAM - DDR2 存储器 IC 2Gb 并联 400 MHz 400 ps 84-FBGA(9x12.5)

MT47H128M16RT-25E IT:C Parametric

Parameter NameAttribute value
category
MakerMicron Technology
series-
Packagetray
memory typeVolatile
memory formatDRAM
technologySDRAM - DDR2
storage2Gb
memory organization128M x 16
memory interfacein parallel
Clock frequency400 MHz
Write cycle time - words, pages15ns
interview time400 ps
Voltage - Power supply1.7V ~ 1.9V
Operating temperature-40°C ~ 95°C(TC)
Installation typesurface mount type
Package/casing84-TFBGA
Supplier device packaging84-FBGA(9x12.5)
Basic product numberMT47H128M16
2Gb: x4, x8, x16 DDR2 SDRAM
Features
DDR2 SDRAM
MT47H512M4 – 64 Meg x 4 x 8 banks
MT47H256M8 – 32 Meg x 8 x 8 banks
MT47H128M16 – 16 Meg x 16 x 8 banks
Features
V
DD
= 1.8V ±0.1V, V
DDQ
= 1.8V ±0.1V
JEDEC-standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
4n-bit prefetch architecture
Duplicate output strobe (RDQS) option for x8
DLL to align DQ and DQS transitions with CK
8 internal banks for concurrent operation
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency - 1
t
CK
Programmable burst lengths: 4 or 8
Adjustable data-output drive strength
64ms, 8192-cycle refresh
On-die termination (ODT)
Industrial temperature (IT) option
RoHS-compliant
Supports JEDEC clock jitter specification
Options
1
• Configuration
– 512 Meg x 4 (64 Meg x 4 x 8 banks)
– 256 Meg x 8 (32 Meg x 8 x 8 banks)
– 128 Meg x 16 (16 Meg x 16 x 8 banks)
• FBGA package (Pb-free) – x16
– 84-ball FBGA (11.5mm x 14mm) Rev. A
• FBGA package (Pb-free) – x4, x8
– 60-ball FBGA (11.5mm x 14mm) Rev. A
• FBGA package (Pb-free) – x16
– 84-ball FBGA (9mm x 12.5mm) Rev. C
• FBGA package (Pb-free) – x4, x8
– 60-ball FBGA (9mm x 11.5mm) Rev. C
• FBGA package (Lead solder) – x16
– 84-ball FBGA (9mm x 12.5mm) Rev. C
• Timing – cycle time
– 1.875ns @ CL = 7 (DDR2-1066)
– 2.5ns @ CL = 5 (DDR2-800)
– 2.5ns @ CL = 6 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
• Self refresh
– Standard
• Operating temperature
– Commercial (0°C T
C
+85°C)
– Industrial (–40°C T
C
+95°C;
–40°C T
A
+85°C)
• Revision
Note:
Marking
512M4
256M8
128M16
HG
HG
RT
EB
PK
-187E
-25E
-25
-3
None
None
IT
:A/:C
1. Not all options listed can be combined to
define an offered product. Use the Part
Catalog Search on
www.micron.com
for
product offerings and availability.
CCMTD-1725822587-6523
2Gb_DDR2.pdf – Rev. J 09/18 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
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