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MT46H32M32LFCM-5 IT:A TR

Description
SDRAM - 移动 LPDDR 存储器 IC 1Gb(32M x 32) 并联 200 MHz 5 ns 90-VFBGA(10x13)
Categorysemiconductor    memory   
File Size3MB,95 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Environmental Compliance
Download Datasheet Parametric View All

MT46H32M32LFCM-5 IT:A TR Overview

SDRAM - 移动 LPDDR 存储器 IC 1Gb(32M x 32) 并联 200 MHz 5 ns 90-VFBGA(10x13)

MT46H32M32LFCM-5 IT:A TR Parametric

Parameter NameAttribute value
category
MakerMicron Technology
series-
PackageTape and Reel (TR)
memory typeVolatile
memory formatDRAM
technologySDRAM - Mobile LPDDR
storage1Gb(32M x 32)
memory interfacein parallel
Write cycle time - words, pages15ns
Voltage - Power supply1.7V ~ 1.95V
Operating temperature-40°C ~ 85°C(TA)
Installation typesurface mount type
Package/casing90-VFBGA
Supplier device packaging90-VFBGA(10x13)
Clock frequency200 MHz
interview time5 ns
Basic product numberMT46H32M32
1Gb: x16, x32 Mobile LPDDR SDRAM
Features
Mobile Low-Power DDR SDRAM
MT46H64M16LF – 16 Meg x 16 x 4 Banks
MT46H32M32LF – 8 Meg x 32 x 4 Banks
Features
V
DD
/V
DDQ
= 1.70–1.95V
Bidirectional data strobe per byte of data (DQS)
Internal, pipelined double data rate (DDR)
architecture; two data accesses per clock cycle
Differential clock inputs (CK and CK#)
Commands entered on each positive CK edge
DQS edge-aligned with data for READs; center-
aligned with data for WRITEs
4 internal banks for concurrent operation
Data masks (DM) for masking write data—one mask
per byte
Programmable burst lengths (BL): 2, 4, 8, or 16
1
Concurrent auto precharge option is supported
Auto refresh and self refresh modes
1.8V LVCMOS-compatible inputs
On-chip temp sensor to control self refresh rate
Partial-array self refresh (PASR)
Deep power-down (DPD)
Status read register (SRR)
Selectable output drive strength (DS)
Clock stop capability
64ms refresh
Table 1: Key Timing Parameters (CL = 3)
Speed Grade
-5
-54
-6
-75
Clock Rate (MHz)
200
185
166
133
Access Time
5.0ns
5.0ns
5.5ns
6.0ns
Options
V
DD
/V
DDQ
1.8V/1.8V
Configuration
64 Meg x 16 (16 Meg x 16 x 4 banks)
32 Meg x 32 (8 Meg x 32 x 4 banks)
Row-size option
JEDEC-standard option
Reduced page-size option
1
Plastic green package
60-ball VFBGA (10mm x 11.5mm)
2
90-ball VFBGA (10mm x 13mm)
3
Timing – cycle time
5ns @ CL = 3
5.4ns @ CL = 3
6ns @ CL = 3
7.5ns @ CL = 3
Power
Standard I
DD2
/I
DD6
Low-power I
DD2
/I
DD6
Operating temperature range
Commercial (0˚ to +70˚C)
Industrial (–40˚C to +85˚C)
Design revision
Notes:
Marking
H
64M16
32M32
LF
LG
CK
CM
-5
-54
-6
-75
None
L
None
IT
:A
1. Contact factory for availability.
2. Only available for x16 configuration.
3. Only available for x32 configuration.
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. K 07/09 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2007
Micron Technology, Inc. All rights reserved.
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