MT41K64M16TW-107 AIT:J datasheet, PDF

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MT41K64M16TW-107 AIT:J: DescriptionSDRAM - DDR3L 存储器 IC 1Gb 并联 933 MHz 20 ns 96-FBGA（8x14）; Categorysemiconductor memory; File Size3MB，209 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT41K64M16TW-107 AIT:J Overview

SDRAM - DDR3L 存储器 IC 1Gb 并联 933 MHz 20 ns 96-FBGA（8x14）

MT41K64M16TW-107 AIT:J Parametric

Parameter Name	Attribute value
category
Maker	Micron Technology
series	Automotive, AEC-Q100
Package	Bulk
memory type	Volatile
memory format	DRAM
technology	SDRAM - DDR3L
storage	1Gb
memory organization	64M x 16
memory interface	in parallel
Clock frequency	933 MHz
Write cycle time - words, pages	-
interview time	20 ns
Voltage - Power supply	1.283V ~ 1.45V
Operating temperature	-40°C ~ 95°C（TC）
Installation type	surface mount type
Package/casing	96-TFBGA
Supplier device packaging	96-FBGA（8x14）
Basic product number	MT41K64M16

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1Gb: x8, x16 Automotive DDR3L SDRAM

Description

Automotive DDR3L SDRAM

MT41K128M8 – 16 Meg x 8 x 8 banks

MT41K64M16 – 8 Meg x 16 x 8 banks

Description

The 1.35V DDR3L SDRAM device is a low-voltage ver-

sion of the 1.5V DDR3 SDRAM device. Refer to the

DDR3 (1.5V) SDRAM data sheet specifications when

running in 1.5V compatible mode.

•

Write leveling

Multipurpose register

Output driver calibration

AEC-Q100

PPAP submission

8D response time

Features

•

= V

DDQ

= +1.35V (1.283V to 1.45V)

Backward compatible to V

= V

DDQ

= 1.5V ±0.075V

Differential bidirectional data strobe

8n-bit prefetch architecture

Differential clock inputs (CK, CK#)

8 internal banks

Nominal and dynamic on-die termination (ODT)

for data, strobe, and mask signals

Programmable CAS (READ) latency (CL)

Programmable CAS additive latency (AL)

Programmable CAS (WRITE) latency (CWL)

Fixed burst length (BL) of 8 and burst chop (BC) of 4

(via the mode register set [MRS])

Selectable BC4 or BL8 on-the-fly (OTF)

Self refresh mode

of -40°C to 105°C

– 64ms, 8192-cycle refresh at -40°C to 85°C

– 32ms at 85°C to 105°C

Self refresh temperature (SRT)

Automatic self refresh (ASR)

Options

• Configuration

– 128 Meg x 8

– 64 Meg x 16

• FBGA package (Pb-free) – x8

– 78-ball FBGA (8mm x 10.5mm)

• FBGA package (Pb-free) – x16

– 96-ball FBGA (8mm x 14mm)

• Timing – cycle time

– 1.07ns @ CL = 13 (DDR3-1866)

• Product certification

– Automotive

• Operating temperature

– Industrial (–40°C T

+95°C)

– Automotive (–40°C T

+105°C)

• Revision

Notes:

Marking

128M8

64M16

-107

•

1. Not all options listed can be combined to

define an offered product. Use the part

catalog search on http://www.micron.com

for available offerings.

2. The datasheet does not support ×4 mode

even though ×4 mode description exists in

the following sections.

Table 1: Key Timing Parameters

Speed Grade

-107

Data Rate (MT/s)

1866

Target

RCD-

RP-CL

13-13-13

RCD

(ns)

CL (ns)

13.91

Table 2: Addressing

Parameter

Configuration

Refresh count

128 Meg x 8

16 Meg x 8 x 8 banks

64 Meg x 16

8 Meg x 16 x 8 banks

PDF: 09005aef85e0b6f6

1Gb_automotive_DDR3L_F.pdf - Rev. C 5/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

1Gb: x8, x16 Automotive DDR3L SDRAM

Description

Contents

Important Notes and Warnings ....................................................................................................................... 11

State Diagram ................................................................................................................................................ 12

Functional Description ................................................................................................................................... 13

Industrial Temperature ............................................................................................................................... 13

Automotive Temperature ............................................................................................................................ 13

General Notes ............................................................................................................................................ 14

Functional Block Diagrams ............................................................................................................................. 15

Ball Assignments and Descriptions ................................................................................................................. 17

Package Dimensions ....................................................................................................................................... 23

Electrical Specifications .................................................................................................................................. 25

Absolute Ratings ......................................................................................................................................... 25

Input/Output Capacitance .......................................................................................................................... 25

Thermal Characteristics .................................................................................................................................. 27

Electrical Specifications – I

Specifications and Conditions ............................................................................ 28

Electrical Characteristics – I

Specifications .................................................................................................. 39

Electrical Specifications – DC and AC .............................................................................................................. 40

DC Operating Conditions ........................................................................................................................... 40

Input Operating Conditions ........................................................................................................................ 41

DDR3L 1.35V AC Overshoot/Undershoot Specification ................................................................................ 45

DDR3L 1.35V Slew Rate Definitions for Single-Ended Input Signals .............................................................. 49

DDR3L 1.35V Slew Rate Definitions for Differential Input Signals ................................................................. 51

ODT Characteristics ....................................................................................................................................... 52

1.35V ODT Resistors ................................................................................................................................... 53

ODT Sensitivity .......................................................................................................................................... 54

ODT Timing Definitions ............................................................................................................................. 54

Output Driver Impedance ............................................................................................................................... 58

34 Ohm Output Driver Impedance .............................................................................................................. 59

DDR3L 34 Ohm Driver ................................................................................................................................ 60

DDR3L 34 Ohm Output Driver Sensitivity .................................................................................................... 61

DDR3L Alternative 40 Ohm Driver ............................................................................................................... 62

DDR3L 40 Ohm Output Driver Sensitivity .................................................................................................... 62

Output Characteristics and Operating Conditions ............................................................................................ 64

Reference Output Load ............................................................................................................................... 67

Slew Rate Definitions for Single-Ended Output Signals ................................................................................. 67

Slew Rate Definitions for Differential Output Signals .................................................................................... 69

Speed Bin Tables ............................................................................................................................................ 70

Electrical Characteristics and AC Operating Conditions ................................................................................... 74

Command and Address Setup, Hold, and Derating ........................................................................................... 92

Data Setup, Hold, and Derating ....................................................................................................................... 99

Commands – Truth Tables ............................................................................................................................. 108

Commands ................................................................................................................................................... 111

DESELECT ................................................................................................................................................ 111

NO OPERATION ........................................................................................................................................ 111

ZQ CALIBRATION LONG ........................................................................................................................... 111

ZQ CALIBRATION SHORT .......................................................................................................................... 111

ACTIVATE ................................................................................................................................................. 111

READ ........................................................................................................................................................ 111

WRITE ...................................................................................................................................................... 112

PRECHARGE ............................................................................................................................................. 113

REFRESH .................................................................................................................................................. 113

PDF: 09005aef85e0b6f6

1Gb_automotive_DDR3L_F.pdf - Rev. C 5/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

1Gb: x8, x16 Automotive DDR3L SDRAM

Description

SELF REFRESH .......................................................................................................................................... 114

DLL Disable Mode ..................................................................................................................................... 115

Input Clock Frequency Change ...................................................................................................................... 119

Write Leveling ............................................................................................................................................... 121

Write Leveling Procedure ........................................................................................................................... 123

Write Leveling Mode Exit Procedure ........................................................................................................... 125

Initialization ................................................................................................................................................. 126

Voltage Initialization/Change ........................................................................................................................ 128

Voltage Switching ............................................................................................................................... 129

Mode Registers .............................................................................................................................................. 130

Mode Register 0 (MR0) ................................................................................................................................... 131

Burst Length ............................................................................................................................................. 131

Burst Type ................................................................................................................................................. 132

DLL RESET ................................................................................................................................................ 133

Write Recovery .......................................................................................................................................... 134

Precharge Power-Down (Precharge PD) ...................................................................................................... 134

CAS Latency (CL) ....................................................................................................................................... 134

Mode Register 1 (MR1) ................................................................................................................................... 136

DLL Enable/DLL Disable ........................................................................................................................... 136

Output Drive Strength ............................................................................................................................... 137

OUTPUT ENABLE/DISABLE ...................................................................................................................... 137

TDQS Enable ............................................................................................................................................. 137

On-Die Termination .................................................................................................................................. 138

WRITE LEVELING ..................................................................................................................................... 138

POSTED CAS ADDITIVE Latency ................................................................................................................ 138

Mode Register 2 (MR2) ................................................................................................................................... 139

CAS WRITE Latency (CWL) ........................................................................................................................ 140

AUTO SELF REFRESH (ASR) ....................................................................................................................... 140

SELF REFRESH TEMPERATURE (SRT) ........................................................................................................ 141

SRT vs. ASR ............................................................................................................................................... 141

DYNAMIC ODT ......................................................................................................................................... 141

Mode Register 3 (MR3) ................................................................................................................................... 142

MULTIPURPOSE REGISTER (MPR) ............................................................................................................ 142

MPR Functional Description ...................................................................................................................... 143

MPR Register Address Definitions and Bursting Order ................................................................................. 144

MPR Read Predefined Pattern .................................................................................................................... 150

MODE REGISTER SET (MRS) Command ........................................................................................................ 150

ZQ CALIBRATION Operation ......................................................................................................................... 151

ACTIVATE Operation ..................................................................................................................................... 152

READ Operation ............................................................................................................................................ 154

WRITE Operation .......................................................................................................................................... 165

DQ Input Timing ....................................................................................................................................... 173

PRECHARGE Operation ................................................................................................................................. 175

SELF REFRESH Operation .............................................................................................................................. 175

Extended Temperature Usage ........................................................................................................................ 177

Power-Down Mode ........................................................................................................................................ 178

RESET Operation ........................................................................................................................................... 186

On-Die Termination (ODT) ............................................................................................................................ 188

Functional Representation of ODT ............................................................................................................. 188

Nominal ODT ............................................................................................................................................ 188

Dynamic ODT ............................................................................................................................................... 190

Dynamic ODT Special Use Case ................................................................................................................. 190

PDF: 09005aef85e0b6f6

1Gb_automotive_DDR3L_F.pdf - Rev. C 5/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

1Gb: x8, x16 Automotive DDR3L SDRAM

Description

Functional Description .............................................................................................................................. 190

Synchronous ODT Mode ................................................................................................................................ 196

ODT Latency and Posted ODT .................................................................................................................... 196

Timing Parameters .................................................................................................................................... 196

ODT Off During READs .............................................................................................................................. 199

Asynchronous ODT Mode .............................................................................................................................. 201

Synchronous to Asynchronous ODT Mode Transition (Power-Down Entry) .................................................. 203

Asynchronous to Synchronous ODT Mode Transition (Power-Down Exit) ........................................................ 205

Asynchronous to Synchronous ODT Mode Transition (Short CKE Pulse) ...................................................... 207

Revision History ............................................................................................................................................ 209

Rev. C – 5/18 .............................................................................................................................................. 209

Rev. B – 2/15 .............................................................................................................................................. 209

Rev. A – 8/14 .............................................................................................................................................. 209

PDF: 09005aef85e0b6f6

1Gb_automotive_DDR3L_F.pdf - Rev. C 5/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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