MT48LC16M16A2B4-6A AAT:G TR datasheet, PDF

Datasheet> All Categories > semiconductor> memory> MT48LC16M16A2B4-6A AAT:G TR

MT48LC16M16A2B4-6A AAT:G TR: DescriptionSDRAM 存储器 IC 256Mb（16M x 16）并联 54-VFBGA（8x8）; Categorysemiconductor memory; File Size4MB，88 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

Download Datasheet Parametric View All

MT48LC16M16A2B4-6A AAT:G TR Overview

SDRAM 存储器 IC 256Mb（16M x 16）并联 54-VFBGA（8x8）

MT48LC16M16A2B4-6A AAT:G TR Parametric

Parameter Name	Attribute value
category
Maker	Micron Technology
series	Automotive, AEC-Q100
Package	卷带（TR）剪切带（CT）Digi-Reel®
memory type	Volatile
memory format	DRAM
technology	SDRAM
storage	256Mb（16M x 16）
memory interface	in parallel
Write cycle time - words, pages	12ns
Voltage - Power supply	3V ~ 3.6V
Operating temperature	-40°C ~ 105°C（TA）
Installation type	surface mount type
Package/casing	54-VFBGA
Supplier device packaging	54-VFBGA（8x8）
Basic product number	MT48LC16M16A2

Preview

Download Datasheet

View All

256Mb: x4, x8, x16 Automotive SDRAM

Features

Automotive SDR SDRAM

MT48LC64M4A2 – 16 Meg x 4 x 4 banks

MT48LC32M8A2 – 8 Meg x 8 x 4 banks

MT48LC16M16A2 – 4 Meg x 16 x 4 banks

Features

• PC100- and PC133-compliant

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• Internal banks for hiding row access/precharge

• Programmable burst lengths: 1, 2, 4, 8, or full page

• Auto precharge, includes concurrent auto precharge

and auto refresh modes

• Self refresh mode (not available on AAT devices)

• Auto refresh

– 64ms, 8192-cycle (commercial and industrial)

– 16ms, 8192-cycle (automotive)

• LVTTL-compatible inputs and outputs

• Single 3.3V ±0.3V power supply

• AEC-Q100

• PPAP submission

• 8D response time

Options

•

Options

• Configurations

– 64 Meg x 4 (16 Meg x 4 x 4 banks)

– 32 Meg x 8 (8 Meg x 8 x 4 banks)

– 16 Meg x 16 (4 Meg x 16 x 4 banks)

• Write recovery (

WR)

–

WR = 2 CLK

• Plastic package – OCPL

– 54-pin TSOP II OCPL

(400 mil)

(standard)

Table 1: Key Timing Parameters

CL = CAS (READ) latency

Speed Grade

-6A

-7E

-75

-7E

-75

Clock

Frequency

167 MHz

143 MHz

133 MHz

100 MHz

Marking

64M4

32M8

16M16

– 54-pin TSOP II OCPL

(400 mil)

Pb-free

– 60-ball FBGA (x4, x8) (8mm x 16mm)

Pb-free

– 54-ball VFBGA (x16) (8mm x 14 mm)

Pb-free

– 54-ball VFBGA (x16) (8mm x 8 mm)

Pb-free

Timing – cycle time

– 6ns @ CL = 3 (x8, x16 only)

– 7.5ns @ CL = 3 (PC133)

– 7.5ns @ CL = 2 (PC133)

Self refresh

– Standard

– Low power

Operating temperature range

– Industrial (–40˚C to +85˚C)

– Automotive (–40˚C to +105˚C)

Revision

Off-center parting line.

Only available on Revision D.

Only available on Revision G.

Contact Micron for availability.

Marking

-6A

-75

-7E

None

AIT

AAT

:D/:G

Notes:

Access Time

CL = 2

–

5.4ns

6ns

CL = 3

5.4ns

–

Setup Time

1.5ns

Hold Time

0.8ns

09005aef848d99e8

256Mb_ait_aat_sdr_esg.pdf - Rev. D 6/18 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 Automotive SDRAM

Features

Contents

Important Notes and Warnings ......................................................................................................................... 7

General Description ......................................................................................................................................... 7

Automotive Temperature .............................................................................................................................. 8

Functional Block Diagrams ............................................................................................................................... 9

Pin and Ball Assignments and Descriptions ..................................................................................................... 12

Package Dimensions ....................................................................................................................................... 16

Temperature and Thermal Impedance ............................................................................................................ 20

Electrical Specifications .................................................................................................................................. 24

Electrical Specifications – I

Parameters ........................................................................................................ 26

Electrical Specifications – AC Operating Conditions ......................................................................................... 28

Functional Description ................................................................................................................................... 31

Commands .................................................................................................................................................... 32

COMMAND INHIBIT .................................................................................................................................. 32

NO OPERATION (NOP) ............................................................................................................................... 33

LOAD MODE REGISTER (LMR) ................................................................................................................... 33

ACTIVE ...................................................................................................................................................... 33

READ ......................................................................................................................................................... 34

WRITE ....................................................................................................................................................... 35

PRECHARGE .............................................................................................................................................. 36

BURST TERMINATE ................................................................................................................................... 36

AUTO REFRESH ......................................................................................................................................... 37

SELF REFRESH ........................................................................................................................................... 37

Truth Tables ................................................................................................................................................... 38

Initialization .................................................................................................................................................. 43

Mode Register ................................................................................................................................................ 45

Burst Length .............................................................................................................................................. 47

Burst Type .................................................................................................................................................. 47

CAS Latency ............................................................................................................................................... 49

Operating Mode ......................................................................................................................................... 49

Write Burst Mode ....................................................................................................................................... 49

Bank/Row Activation ...................................................................................................................................... 50

READ Operation ............................................................................................................................................. 51

WRITE Operation ........................................................................................................................................... 60

Burst Read/Single Write .............................................................................................................................. 67

PRECHARGE Operation .................................................................................................................................. 68

Auto Precharge ........................................................................................................................................... 68

AUTO REFRESH Operation ............................................................................................................................. 80

SELF REFRESH Operation ............................................................................................................................... 82

Power-Down .................................................................................................................................................. 84

Clock Suspend ............................................................................................................................................... 85

Revision History ............................................................................................................................................. 88

Rev. D – 6/18 .............................................................................................................................................. 88

Rev. C – 1/14 ............................................................................................................................................... 88

Rev. B – 11/13 ............................................................................................................................................. 88

Rev. A – 04/12 ............................................................................................................................................. 88

09005aef848d99e8

256Mb_ait_aat_sdr_esg.pdf - Rev. D 6/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb: x4, x8, x16 Automotive SDRAM

Features

List of Figures

Figure 1: 64 Meg x 4 Functional Block Diagram ................................................................................................. 9

Figure 2: 32 Meg x 8 Functional Block Diagram ............................................................................................... 10

Figure 3: 16 Meg x 16 Functional Block Diagram ............................................................................................. 11

Figure 4: 54-Pin TSOP (Top View) .................................................................................................................. 12

Figure 5: 60-Ball FBGA (Top View) ................................................................................................................. 13

Figure 6: 54-Ball VFBGA (Top View) ............................................................................................................... 14

Figure 7: 54-Pin Plastic TSOP "TG/P" (400 mil) ............................................................................................... 16

Figure 8: 60-Ball TFBGA "BB/FB" (8mm x 16mm) (x4, x8) ............................................................................... 17

Figure 9: 54-Ball VFBGA "BG/FG" (8mm x 14mm) (x16) .................................................................................. 18

Figure 10: 54-Ball VFBGA "B4/F4" (8mm x 8mm) (x16) ................................................................................... 19

Figure 11: Example: Temperature Test Point Location, 54-Pin TSOP (Top View) ............................................... 22

Figure 12: Example: Temperature Test Point Location, 54-Ball VFBGA (Top View) ............................................ 22

Figure 13: Example: Temperature Test Point Location, 60-Ball FBGA (Top View) .............................................. 23

Figure 14: ACTIVE Command ........................................................................................................................ 33

Figure 15: READ Command ........................................................................................................................... 34

Figure 16: WRITE Command ......................................................................................................................... 35

Figure 17: PRECHARGE Command ................................................................................................................ 36

Figure 18: Initialize and Load Mode Register .................................................................................................. 44

Figure 19: Mode Register Definition ............................................................................................................... 46

Figure 20: CAS Latency .................................................................................................................................. 49

Figure 21: Example: Meeting

RCD (MIN) When 2 <

RCD (MIN)/

CK < 3 .......................................................... 50

Figure 22: Consecutive READ Bursts .............................................................................................................. 52

Figure 23: Random READ Accesses ................................................................................................................ 53

Figure 24: READ-to-WRITE ............................................................................................................................ 54

Figure 25: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 55

Figure 26: READ-to-PRECHARGE .................................................................................................................. 55

Figure 27: Terminating a READ Burst ............................................................................................................. 56

Figure 28: Alternating Bank Read Accesses ..................................................................................................... 57

Figure 29: READ Continuous Page Burst ......................................................................................................... 58

Figure 30: READ – DQM Operation ................................................................................................................ 59

Figure 31: WRITE Burst ................................................................................................................................. 60

Figure 32: WRITE-to-WRITE .......................................................................................................................... 61

Figure 33: Random WRITE Cycles .................................................................................................................. 62

Figure 34: WRITE-to-READ ............................................................................................................................ 62

Figure 35: WRITE-to-PRECHARGE ................................................................................................................. 63

Figure 36: Terminating a WRITE Burst ............................................................................................................ 64

Figure 37: Alternating Bank Write Accesses ..................................................................................................... 65

Figure 38: WRITE – Continuous Page Burst ..................................................................................................... 66

Figure 39: WRITE – DQM Operation ............................................................................................................... 67

Figure 40: READ With Auto Precharge Interrupted by a READ ......................................................................... 69

Figure 41: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 70

Figure 42: READ With Auto Precharge ............................................................................................................ 71

Figure 43: READ Without Auto Precharge ....................................................................................................... 72

Figure 44: Single READ With Auto Precharge .................................................................................................. 73

Figure 45: Single READ Without Auto Precharge ............................................................................................. 74

Figure 46: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 75

Figure 47: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 75

Figure 48: WRITE With Auto Precharge ........................................................................................................... 76

Figure 49: WRITE Without Auto Precharge ..................................................................................................... 77

Figure 50: Single WRITE With Auto Precharge ................................................................................................. 78

09005aef848d99e8

256Mb_ait_aat_sdr_esg.pdf - Rev. D 6/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Recommended Resources

One article to understand the intermediate bus structure

Sharp HC2104R color TV standby control circuit schematic diagram

Double lamp electronic ballast circuit

Circuit diagram for charging using external constant current source

AC/DC switching power supply

TDA1170S power amplifier circuit

Found a good MSP430 forum: Recently I found a very good MSP430 professional forum in China.Website: http://bbs.microcontrol.cn...; 305932515 Microcontroller MCU

USB enumeration process diagram.....: [img]http://www.ouravr.com/bbs/bbs_upload88916/files_3/armok0170287.gif[/img]...; songbo MCU

Please give me some advice, thank you.: For the 32 -bit counter and 32- bit adder circuits, indicate which circuit is more suitable to be implemented with CPLD devices and which circuit is more suitable to be implemented with FPGA devices. ...; 小龚 FPGA/CPLD

Application expansion is the source of innovation in simulation technology: Tang Xiaoquan, Associate Researcher, Institute of Electrical Engineering, Chinese Academy of Sciences Digital technology is advancing rapidly in the direction indicated by Moore's Law. While the tradi...; fighting Analog electronics

About Darlington: I just sent a signal to the Darlington circuit to turn it into a switch. Will there be a 12V electrical output? But my measurement showed that the output was only less than 4V....; tony20187 51mcu

AMD wants to sue Intel for alleged monopoly, suppressing competition: On January 10, New York Attorney General Andrew Cuomo began an investigation into Intel to determine whether it has suppressed its rival AMD through unfair means and whether it has violated federal an...; open82977352 The Industrial Cloud

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components