www.fairchildsemi.com
S-Video Filter and 75
Ω
Line Drivers with Summed
Composite Output
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
6.7MHz Y and C filters, with CV out for NTSC or PAL
75
Ω
cable line driver for Y, C, CV, and TV modulator
43dB stopband attenuation at 27MHz
1dB flatness up to 4.8MHz
No external frequency select components or clocks
12ns group delay flatness up to 10MHz
5% overshoot on any input edge
AC coupled input and output (ML6428CS-1)
AC coupled input and DC coupled output
(ML6428CS-2)
0.4% differential gain on all channels, 0.4º differential
phase on all channels
0.7% total harmonic distortion on all channels
5V ±10% operation
DC restore with low tilt
ML6428
General Description
The ML6428 is a dual Y/C 4th-order Butterworth lowpass
video filter optimized for minimum overshoot and flat group
delay. The device also contains a summing circuit to gener-
ate filtered composite video.
The Y and C input signals from DACs are AC coupled into
the ML6428. Both channels have DC restore circuitry to
clamp the DC input levels during video sync. The Y channel
uses a sync tip clamp. The CV and the C channels share a
feedback clamp.
All outputs must be AC coupled into their loads for the -1
version. The -2 version must be DC coupled. All inputs (-1
and -2 versions) are AC coupled. The Y or C outputs can
drive 2VP-P into a 150
Ω
load, while the CV output can drive
2VP-P into 75
Ω
. Thus the CV output is capable of driving
two independent 150
Ω
loads to 2VP-P.
On the CV output, one of the 75
Ω
loads can be shorted to
ground with no loss of drive to the remaining load. The Y, C
and CV channels have a gain of 2 (6dB) with 1VP-P input
levels.
Block Diagram
VCC
2
VCCO
7
YIN
1
4th-ORDER
FILTER
8
BUFFER
YOUT
+
SYNC TIP CLAMP
Σ
TRANSCONDUCTANCE
ERROR AMP
6
BUFFER
CVOUT
+
CIN
4
4th-ORDER
FILTER
5
BUFFER
COUT
3
GND
REV. 1C April 2004
DATA SHEET
ML6428
Electrical Table
Unless otherwise specified, V
CC
= 5V ±10%, All inputs AC coupled with 100nF, ML6428-1
outputs must be AC coupled, ML6428-2 outputs must be DC coupled. T
A
= Operating Temperature Range
1
Symbol
ICC
AV
Parameter
Supply Current
Low Frequency Gain (All Channels)
C DC Output Level (During Sync)
Y Sync Output Level
ML6428-1
ML6428-2
Y+C Sync Output
Level
tCLAMP
f1dB
fC
0.8fC
fSB
Vi
NOISE
OS
ISC
CL
dG
d
Φ
THD
XTALK
ML6428-1
ML6428-2
Conditions
No Load (VCC = 5.0V)
VIN = 100mVP-P at 300KHz
Sync Present on Y
Sync Present on Y
Sync Present on Y
Sync Present on Y
Sync Present on Y
Settled to Within 10mV
4.0
Min.
5.34
1.7
0.7
0.35
0.7
0.35
Typ.
52
6.0
1.9
0.9
0.54
0.92
0.48
2
4.8
6.7
1.5
fIN = 27MHz to 100MHz worst
case
AC Coupled
ML6428-1, -2
25Hz to 50MHz
2VP-P Output Pulse (loaded)
VOUT C, Y, or CV (Note 2)
All Outputs
All Outputs
All Outputs
VOUT = 1.8VP-P,
Y/C Out at 3.58MHz/4.43MHz
From C Input of 0.5VP-P at
3.58MHz/4.43MHz, to Y
Output
From Y Input of 0.4VP-P at
3.58MHz, to C Output
PSRR
tpd
∆
tpd
PSRR (All Channels)
Group Delay (All Channels)
Group Delay Deviation from
Flatness
(All Channels)
0.5VP-P (100kHz) at VCC
100kHz
to 3.58MHz (NTSC)
to 4.43MHz (PAL) without
peaking (see Figures 7 to 11)
to 10MHz
tSKEW
Note
Max.
80
6.65
2.3
1.3
0.95
1.3
0.95
Units
mA
dB
V
V
V
V
V
ms
MHz
MHz
dB
Clamp Response Time (Y Channel)
-1dB Bandwidth (Flatness)
(All Channels)
-3dB Bandwidth (Flatness)
(All Channels)
0.8 x fC Attenuation (Y, C)
Stopband Rejection (All Channels)
Input Signal Dynamic Range
Output Noise (All Channels)
Peak Overshoot (All Channels)
Output Short Circuit Current
(All Channels)
Output Shunt Capacitance
(All Channels)
Differential Gain (All Channels)
Differential Phase (All Channels)
Output Distortion (All Channels)
Crosstalk
–42
1.0
1.4
2.3
4.3
100
–38
dB
VP-P
mVRMS
%
mA
35
0.4
0.4
0.7
–55
pF
%
°
%
dB
–58
–49
60
4
7
12
1
dB
dB
ns
ns
ns
ns
ns
Skew Between Y & C Outputs
1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
2: Sustained short circuit protection limited to 10 seconds.
REV. 1C April 2004
3
ML6428
DATA SHEET
Functional Description
The ML6428 is a dual monolithic continuous time video
filter designed for reconstructing the luminance and
chrominance signals from an S-Video D/A source.
Composite video output is generated by summing the Y
and C outputs. The ML6428CS-1 is intended for use in AC
coupled input and output applications. The ML6428CS-2 is
intended for AC coupled input and DC coupled output
applications (see Figures 5 and 6).
The filters have a 4th-order Butterworth characteristic with
an optimization toward low overshoot and flat group delay.
All outputs are capable of driving 2VP-P into 150
Ω
video
loads, with up to 35pF of load capacitance at the output pin.
ML6428CS-1 outputs are AC coupled, ML6428CS-2 outputs
are DC coupled. The CV output can drive two video loads
plus a high-impedance modulator. Thus the CV output is
intended to simultaneously drive a VCR, a TV, and a high-
impedance modulator. Y and C are capable of driving a 75
Ω
load at 1VP-P. The ML6428 is capable of driving two com-
posite loads and a TV modulator simultaneously.
All channels are clamped during sync to establish the appro-
priate output voltage swing range. Thus the input coupling
capacitors do not behave according to the conventional RC
time constant. Clamping for all channels settles within 2ms
of a change in video input sources.
In most applications, the ML6428's input coupling capacitors
are 0.1µF. The Y input sinks 1.6µA during active video,
which nominally tilts a horizontal line by 2mV (max) at
the Y output (Figure 4). During sync, the clamp typically
sources 20µA to restore the DC level. The net result is that
the average input current is zero.
Any change in the input coupling capacitor's value will
inversely alter the amount of tilt per line. Such a change
will also linearly affect the clamp response times.
The C channel has no pulldown current sources and is essen-
tially tilt-free. Its input is clamped by a feedback amp which
responds to the CV output. Since CV = Y+C, the CV output
will droop by the same amount as Y during active video, and
will rise by the same amount as Y during sync.
The ML6428 is robust and stable under all stated load and
input conditions. Capacitavely bypassing both VCC pins
directly to ground ensures this performance. (See Figures 5
and 6)
capacitance (at the output pin) can be driven without stability
or slew issues. A 220µF AC coupling capacitor is recom-
mended at the output (ML6428-1 only).
Chrominance (C) I/O
The chroma input is driven by a low impedance source of
0.7VP-P or the output of a 75
Ω
terminated line. The input is
required to be AC coupled via a 0.1uF coupling capacitor
which allows for a nominal clamping time of 1ms. The
chroma output is capable of driving a 150
Ω
load at 2VP-P
or 1VP-P into a 75
Ω
load. ML6428CS-1 outputs are AC
coupled, ML6428CS-2 outputs are DC coupled. Up to 35pF
of load capacitance can be driven without stability or slew
issues. A 220µF AC coupling capacitor is recommended at
the output (ML6428-1 only).
Composite video (CV) output
The composite video output is capable of driving 2 CV loads
to 2VP-P and a high input impedance CV modulator.
ML6428CS-1 outputs are AC coupled, ML6428CS-2 outputs
are DC coupled. It is intended to drive three devices: TV,
VCR, and a modulator. The TV or VCR input can be shorted
to ground and the other outputs will still meet specifications.
Up to 35pF of load capacitance (at the output pin) can be
driven without stability or slew issues.
Using the ML6428 for PAL Applications
The ML6428 can be optimized for PAL video by adding
frequency peaking to the composite and S-video outputs.
Figures 7 and 8 illustrate the use of a additional external
capacitor, 330pF, added in parallel to the output source
termination resistor. This raises the frequency response from
1.6 dB down at 4.8Mhz to 0.35dB down at 4.8MHz allowing
for accurate reproduction of the upper sideband of the PAL
subcarrier. Figure 9 shows the frequency response of PAL
video with various values of peaking capacitors (0pF, 220pF,
270pF, 330pF) between 0 and 10MHz.
For NTSC applications without the peaking capacitor the
rejection at 27MHz is 42dB (typical) while for PAL applica-
tions with the peaking capacitor the rejection at 27MHz is
38dB (typical). This is shown in Figure 10. The differential
group delay is shown in Figure 11 with and without a peak-
ing capacitor (0pF, 220pF, 270pF, and 330pF) varies slightly
with capacitance, going from 8ns to 13ns.
Luminance (Y) I/O
The luma input is driven by either a low impedance source of
1VP-P or the output of a 75
Ω
terminated line. The input is
required to be AC coupled via a 0.1uF coupling capacitor
which allows for a nominal settling time of 2ms. The luma
output is capable of driving a 150
Ω
load at 2VP-P or 1VP-P
into a 75
Ω
load. ML6428CS-1 outputs are AC coupled,
ML6428CS-2 outputs are DC coupled.Up to 35pF of load
4
REV. 1C April 2004
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