EFR32MG12 Mighty Gecko Multi-Protocol
Wireless SoC Family Data Sheet
The Mighty Gecko multi-protocol family of SoCs is part of the
Wireless Gecko portfolio. Mighty Gecko SoCs are ideal for ena-
bling energy-friendly multi-protocol, multi-band networking for IoT
devices.
BUFC
FRC
CRC
RAC
C
•
•
•
•
•
•
ARM Cortex
TM
M4 processor
with DSP extensions and FPU
Flash Program
Memory
RAM Memory
RFSENSE
Sub GHz
The single-die solution provides industry-leading energy efficiency, ultra-fast wakeup
times, a scalable power amplifier, and no-compromise MCU features.
Mighty Gecko applications include:
IoT Multi-Protocol Devices
Connected Home
Lighting
Health and Wellness
Metering
Home and Building Automation and Security
on
Core / Memory
Memory
Protection Unit
Debug Interface
with ETM
DMA Controller
KEY FEATURES
• 32-bit ARM® Cortex®-M4 core with 40
MHz maximum operating frequency
• Up to 1 MB of flash and 256 kB of RAM
• Pin-compatible with EFR32MG1 QFN48
devices
• 12-channel Peripheral Reflex System,
Low-Energy Sensor Interface & Multi-
channel Capacitive Sense Interface
• Autonomous Hardware Crypto Accelerator
and True Random Number Generator
• Integrated PA with up to 19 dBm transmit
power for 2.4 GHz and Sub-GHz radios
• Integrated balun for 2.4 GHz
• Robust peripheral set and up to 65 GPIO
fid
Clock Management
High Frequency
Crystal
Oscillator
Low Frequency
RC Oscillator
Low Frequency
Crystal
Oscillator
High Frequency
RC Oscillator
Auxiliary High
Frequency RC
Oscillator
Ultra Low
Frequency RC
Oscillator
Peripheral Reflex System
en
Energy Management
Voltage
Regulator
DC-DC
Converter
Brown-Out
Detector
Other
CRYPTO
Voltage Monitor
Power-On Reset
CRC
tia
True Random
Number Generator
32-bit bus
Radio Transceiver
LNA
RF Frontend
PA
Q
To Sub GHz
receive I/Q
mixers and PA
I
PGA
DEMOD
Serial
Interfaces
USART
I/O Ports
External
Interrupts
General
Purpose I/O
Timers and Triggers
Analog I/F
ADC
Timer/Counter
Protocol Timer
IFADC
Low Energy
UART
TM
Low Energy
Timer
Analog
Comparator
IDAC
Watchdog Timer
Real Time
Counter and
Calendar
Cryotimer
l
Capacitive
Touch
VDAC
RFSENSE
AGC
I
2
C
Pin Reset
Pulse Counter
2.4 GHz
BALUN
I
LNA
RF Frontend
PA
Q
Frequency
Synthesizer
To 2.4 GHz receive
I/Q mixers and PA
MOD
Pin Wakeup
To Sub GHz
and 2.4 GHz PA
Low Energy
Sensor Interface
Op-Amp
Lowest power mode with peripheral operational:
EM0—Active
EM1—Sleep
EM2—Deep Sleep
EM3—Stop
EM4—Hibernate
EM4—Shutoff
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This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Silicon
Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).
Preliminary Rev. 0.5
EFR32MG12 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Feature List
1. Feature List
The EFR32MG12 highlighted features are listed below.
•
Low Power Wireless System-on-Chip.
• High Performance 32-bit 40 MHz ARM Cortex
®
-M4 with
DSP instruction and floating-point unit for efficient signal
processing
• Embedded Trace Macrocell (ETM) for advanced debugging
• Up to 1024 kB flash program memory
• Up to 256 kB RAM data memory
• 2.4 GHz and Sub-GHz radio operation
• TX power up to 19 dBm
•
Low Energy Consumption
• 10.0 mA RX current at 2.4 GHz (1 Mbps GFSK)
• 10.8 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS)
• 8.2 mA TX current @ 0 dBm output power at 2.4 GHz
• 66 μA/MHz in Active Mode (EM0)
• TBD μA EM2 DeepSleep current (256 kB RAM retention
and RTCC running from LFXO)
• 1.5 μA EM2 DeepSleep current (16 kB RAM retention and
RTCC running from LFRCO)
• 1.75 μA EM3 Stop current (State and 256 kB RAM reten-
tion)
• Wake on Radio with signal strength detection, preamble
pattern detection, frame detection and timeout
•
High Receiver Performance
• -95.2 dBm sensitivity @ 1 Mbit/s GFSK
• -102 dBm sensitivity @ 250 kbps O-QPSK DSSS
•
Supported Modulation Format
• 2-FSK / 4-FSK with fully configurable shaping
• Shaped OQPSK / (G)MSK
•
Supported Protocols:
• Bluetooth Smart
• ZigBee
®
• Thread
• Proprietary Protocols
•
Support for Internet Security
• General Purpose CRC
• True Random Number Generator
• Hardware Cryptographic Acceleration for AES 128/256,
SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC
•
Wide selection of MCU peripherals
• 12-bit 1 Msps SAR Analog to Digital Converter (ADC)
• 2×Analog Comparator (ACMP)
• 2×Digital to Analog Converter (VDAC)
• 3×Operational Amplifier (Opamp)
• Digital to Analog Current Converter (IDAC)
• Low-Energy Sensor Interface (LESENSE)
• Multi-channel Capacitive Sense Interface (CSEN)
• Up to 54 pins connected to analog channels (APORT)
shared between analog peripherals
• Up to 65 General Purpose I/O pins with output state reten-
tion and asynchronous interrupts
• 8 Channel DMA Controller
• 12 Channel Peripheral Reflex System (PRS)
• 2×16-bit Timer/Counter
• 3 + 4 Compare/Capture/PWM channels
• 2×32-bit Timer/Counter
• 3 + 4 Compare/Capture/PWM channels
• 32-bit Real Time Counter and Calendar
• 16-bit Low Energy Timer for waveform generation
• 32-bit Ultra Low Energy Timer/Counter for periodic wake-up
from any Energy Mode
• 3×16-bit Pulse Counter with asynchronous operation
• 2×Watchdog Timer with dedicated RC oscillator
• 4×Universal Synchronous/Asynchronous Receiver/Trans-
mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I
2
S)
• Low Energy UART (LEUART
™
)
C
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on
fid
en
• 2×I
2
C interface with SMBus support and address recogni-
tion in EM3 Stop
•
Wide Operating Range
• 1.8 V to 3.8 V single power supply
• Integrated DC-DC, down to 1.8 V output with up to 200 mA
load current for system
• -40 °C to 85 °C
•
QFN48 7x7 mm Package
•
BGA125 7x7 mm Package
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Preliminary Rev. 0.5 | 1
EFR32MG12 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Ordering Information
2. Ordering Information
Table 2.1. Ordering Information
Ordering Code
Protocol Stack
Frequency Band
@ Max TX Power
EFR32MG12P433F1024GL125-B
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• 2.4 GHz @ 19 dBm
• Sub-GHz @ 20 dBm
Flash
(kB)
1024
RAM
(kB)
256
GPIO
Package
65
BGA125
C
EFR32MG12P433F1024GM48-B
• 2.4 GHz @ 19 dBm
• Sub-GHz @ 20 dBm
1024
256
28
QFN48
EFR32MG12P432F1024GL125-B
EFR32MG12P432F1024GM48-B
EFR32MG12P332F1024GL125-B
EFR32MG12P332F1024GM48-B
EFR32MG12P232F1024GL125-B
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• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
2.4 GHz @ 19 dBm
1024
256
65
BGA125
fid
2.4 GHz @ 19 dBm
1024
256
31
QFN48
en
2.4 GHz @ 10 dBm
1024
2.4 GHz @ 10 dBm
1024
2.4 GHz @ 19 dBm
1024
256
65
BGA125
tia
256
31
128
65
QFN48
l
BGA125
Preliminary Rev. 0.5 | 2
EFR32MG12 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Ordering Information
Ordering Code
Protocol Stack
Frequency Band
@ Max TX Power
EFR32MG12P232F1024GM48-B
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
• Bluetooth Low
Energy
• ZigBee
• Thread
• ZigBee RC
• Proprietary
2.4 GHz @ 19 dBm
Flash
(kB)
1024
RAM
(kB)
128
GPIO
Package
31
QFN48
EFR32MG12P132F1024GL125-B
2.4 GHz @ 10 dBm
1024
128
65
BGA125
C
EFR32MG12P132F1024GM48-B
Series
Gecko
Wireless Gecko 32-bit
EFR32 X G 1 2 P 132 F 1024 G L 125
–
A R
Tape and Reel (Optional)
Revision
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Device Configuration
Family – M (Mighty), B (Blue), F (Flex)
2.4 GHz @ 10 dBm
1024
128
31
QFN48
fid
Memory Type (Flash)
Feature Set Code – r2r1r0
r2: Reserved
r1: RF Type – 3 (TRX), 2 (RX), 1 (TX)
r0: Frequency Band – 1 (Sub-GHz), 2 (2.4 GHz), 3 (Dual-Band)
Performance Grade – P (Performance), B (Basic), V (Value)
Figure 2.1. OPN Decoder
en
Pin Count
Package – M (QFN), L (BGA)
Flash Memory Size in kB
Temperature Grade – G (-40 to +85 °C), -I (-40 to +125 °C)
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Preliminary Rev. 0.5 | 3
EFR32MG12 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
System Overview
3. System Overview
3.1 Introduction
The EFR32 product family combines an energy-friendly MCU with a highly integrated radio transceiver. The devices are well suited for
any battery operated application as well as other systems requiring high performance and low energy consumption. This section gives a
short introduction to the full radio and MCU system. The detailed functional description can be found in the EFR32 Reference Manual.
A block diagram of the EFR32MG12 family is shown in
Figure 3.1 Detailed EFR32MG12 Block Diagram on page 4.
The diagram
shows a superset of features available on the family, which vary by OPN. For more information about specific device features, consult
Ordering Information.
BUFC
FRC
CRC
LNA
RAC
DVDD
bypass
VDAC
VREGVDD
VREGSW
DECOUPLE
LFXTAL_P
LFXTAL_N
HFXTAL_P
HFXTAL_N
Input Mux
DC-DC
Converter
Voltage
Regulator
ULFRCO
AUXHFRCO
LFRCO
LFXO
HFRCO
HFXO
VDD
12-bit ADC
Temp
Sense
Capacitive
Touch
+
-
Analog Comparator
Figure 3.1. Detailed EFR32MG12 Block Diagram
3.2 Radio
The Mighty Gecko family features a highly configurable radio transceiver supporting a wide range of wireless protocols.
3.2.1 Antenna Interface
APORT
Clock Management
Internal
Reference
Op-Amp
The 2.4 GHz antenna interface consists of two pins (2G4RF_IOP and 2G4RF_ION) that interface directly to the on-chip BALUN. The
2G4RF_ION pin should be grounded externally.
The external components and power supply connections for the antenna interface typical applications are shown in the RF Matching
Networks section.
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+
-
AVDD
Watchdog
Timer
Mux & FB
C
SUBGRF_IP
SUBGRF_IN
SUBGRF_OP
SUBGRF_ON
RFSENSE
2G4RF_IOP
2G4RF_ION
BALUN
RESETn
Debug Signals
(shared w/GPIO)
Serial Wire
and ETM
Debug /
Programming
PAVDD
RFVDD
IOVDD
Radio Transceiver
LNA
Port I/O Configuration
DEMOD
IOVDD
Sub-GHz RF
I
PA
Digital Peripherals
LETIMER
TIMER
CRYOTIMER
PCNT
RTC / RTCC
USART
LEUART
I2C
CRYPTO
CRC
Port F
Drivers
Port I
Drivers
Port J
Drivers
Port K
Drivers
PFn
Port
Mapper
Port C
Drivers
Port D
Drivers
PCn
Port B
Drivers
PBn
Port A
Drivers
PAn
on
Q
I
PGA
2.4 GHz RF
Frequency
Synthesizer
AGC
PA
IFADC
Q
To RF
Frontend
Circuits
MOD
Reset
Management
Unit
Brown Out /
Power-On
Reset
ARM Cortex-M4 Core
Up to 1024 KB ISP Flash
Program Memory
Up to 256 KB RAM
PDn
Energy Management
Voltage
Monitor
fid
Memory Protection Unit
Floating Point Unit
DMA Controller
A A
H P
B B
LESENSE
Analog Peripherals
PIn
IDAC
PJn
en
PKn
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Preliminary Rev. 0.5 | 4
51mcu
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