CY7C335-50WC datasheet, PDF - EEWORLD Datasheet

CY7C335-50WC: DescriptionUV PLD, 25ns, PAL-Type, CMOS, CDIP28, 0.300 INCH, WINDOWED, CERDIP-28; CategoryProgrammable logic devices Programmable logic; File Size523KB，15 Pages; ManufacturerCypress Semiconductor

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CY7C335-50WC Overview

UV PLD, 25ns, PAL-Type, CMOS, CDIP28, 0.300 INCH, WINDOWED, CERDIP-28

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	DIP
package instruction	0.300 INCH, WINDOWED, CERDIP-28
Contacts	28
Reach Compliance Code	not_compliant
Other features	12 I/O MACROCELLS; 3 EXTERNAL CLOCKS; VARIABLE PRODUCT TERMS; SHARED INPUT/CLOCK
Architecture	PAL-TYPE
maximum clock frequency	33.3 MHz
JESD-30 code	R-GDIP-T28
JESD-609 code	e0
length	37.0205 mm
Dedicated input times	9
Number of I/O lines	12
Number of entries	24
Output times	12
Number of product terms	256
Number of terminals	28
Maximum operating temperature	75 °C
Minimum operating temperature
organize	9 DEDICATED INPUTS, 12 I/O
Output function	MACROCELL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	WDIP
Encapsulate equivalent code	DIP28,.3
Package shape	RECTANGULAR
Package form	IN-LINE, WINDOW
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	UV PLD
propagation delay	25 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

This Material Copyrighted By Its Respective Manufacturer

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