EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

530AA187M500DG

Description
振荡器 187.5 MHz LVPECL XO(标准) 3.3V 启用/禁用 6-SMD,无引线
CategoryPassive components    oscillator   
File Size302KB,13 Pages
ManufacturerSilicon Labs
Websitehttps://www.silabs.com
Download Datasheet Parametric View All

530AA187M500DG Online Shopping

Suppliers Part Number Price MOQ In stock  
530AA187M500DG - - View Buy Now

530AA187M500DG Overview

振荡器 187.5 MHz LVPECL XO(标准) 3.3V 启用/禁用 6-SMD,无引线

530AA187M500DG Parametric

Parameter NameAttribute value
category
MakerSilicon Labs
seriesSi530
Packagebring
basic resonatorcrystal
typeXO (Standard)
Functionenable/disable
outputLVPECL
Voltage - Power supply3.3V
frequency stability±50ppm
绝对牵引范围 (APR)-
Operating temperature-40°C ~ 85°C
spread spectrum bandwidth-
Current - Power Supply (Maximum)121mA
grade-
Installation typesurface mount type
Package/casing6-SMD, no leads
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
Height - Installation (maximum)0.071"(1.80mm)
电流 - 供电(禁用)(最大值)75mA
frequency187.5 MHz
Basic product numberSI530
QuartusII Warning Information Analysis
[font=Verdana, Helvetica, Arial, sans-serif] QuartusII warning information analysis [replyview] When compiling and simulating under QuartusII, a lot of warnings will appear, some of which can be ignor...
unbj FPGA/CPLD
I would like to ask Brother Gooogleman a question
I bought a friendlyarm linux+2440+0v9650, and found that the image is only 1280x1024@7.5fps. It is so slow, I want to change it to VGA30fps or 15fps. I wonder if you can share the register configurati...
liaorentai Embedded System
Does anyone have a tool that can generate e-books from links?
It is the kind of software that allows me to click on a title and go to a link.Hey, please, who can contribute? :)I am going to organize some links of the jar....
soso Talking
Simulation Workflow
Verilog is used as the design language, ModelSim + Debussy is used as the design tool. My current working platform is Windows, and the version used is ModelSim6.2a + Debussy5.3v9. [/size][/font][font=...
eeleader FPGA/CPLD
Can the IO terminal of PDIUSBD12 be directly controlled by the program to send out a continuous level?
The driver can directly access the IO terminal, so can it directly control the IO terminal to send a continuous level?...
zhouqifa Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2507  1447  647  1646  1545  51  30  14  34  32 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号