Field Programmable Gate Array, 848 CLBs, 6000 Gates, 100MHz, CMOS, CPGA207, CERAMIC, PGA-207
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| package instruction | PGA, |
| Reach Compliance Code | compliant |
| ECCN code | 3A001.A.2.C |
| Other features | MAX 168 I/OS |
| maximum clock frequency | 100 MHz |
| Combined latency of CLB-Max | 3 ns |
| JESD-30 code | S-CPGA-P207 |
| JESD-609 code | e4 |
| length | 44.958 mm |
| Configurable number of logic blocks | 848 |
| Equivalent number of gates | 6000 |
| Number of terminals | 207 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| organize | 848 CLBS, 6000 GATES |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | PGA |
| Package shape | SQUARE |
| Package form | GRID ARRAY |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
| Certification status | Not Qualified |
| Filter level | MIL-STD-883 |
| Maximum seat height | 3.429 mm |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | GOLD |
| Terminal form | PIN/PEG |
| Terminal pitch | 2.54 mm |
| Terminal location | PERPENDICULAR |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 44.958 mm |
| Base Number Matches | 1 |
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