DEMO MANUAL DC1012A
LTC2499/LTC2497/LTC2495
24-/16-Bit Easy Drive
8-/16- Channel Delta Sigma
ADC with I
2
C Interface
DESCRIPTION
Demonstration circuit 1012A-A features the
LTC
®
2499
8-/16-channel, 24-bit delta sigma ADC with Easy Drive™
inputs. Key DC specifications include 2ppm INL, 1ppm
offset, 25ppm full-scale error and 10nV/°C offset drift. In
the 6.8Hz/600nV
RMS
mode, input normal mode rejection
of 50Hz and 60Hz noise is better than 87dB. The LTC2499
also includes an internal temperature sensor that is accurate
to 2°C over the operating temperature range.
DC1012A-B features the LTC2497 16-bit
∆Σ
ADC that is
pinout and software compatible with the LTC2499.
DC1012A-C features the LTC2495 16-bit
∆Σ
ADC that also
includes a PGA with a gain range from 1 to 256 and the
same temperature sensor as the LTC2499.
DC1012A is a member of Linear Technology’s QuikEval™
family of demonstration boards. It is designed to allow
easy evaluation of the LTC2499, LTC2497 or LTC2495.
DC1012A may be connected directly to the target ap-
plication’s analog signals while using the DC590 USB
serial controller board and QuikEval software to measure
performance. The exposed ground planes allow proper
grounding to prototype circuitry. After evaluating with
LTC’s software, the digital signals can be connected to
the application’s processor/controller for development
of the serial interface.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Easy Drive, QuikEval and C-Load are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
Figure 1. Proper Measurement Equipment Setup
dc1012af
1
DEMO MANUAL DC1012A
QUICK START PROCEDURE
Connect the DC1012A to a DC590 USB serial controller
using the supplied 14-conductor ribbon cable. Connect
the DC590 to host PC with a standard USB A/B cable.
Run the evaluation software supplied with the DC590 or
downloaded from www.linear.com/software. The correct
program will be loaded automatically. Click the COLLECT
button to start reading the input voltage. The software
allows for selecting the input channel, single ended or dif-
ferential mode and 50Hz/60Hz rejection settings. Selecting
2× speed located at the bottom of the strip-chart display
will double the data output rate at the expense of offset
accuracy (LTC2499 and LTC2495 only).
Tools are available for logging data, changing reference
voltage, changing the number of points in the strip chart
and histogram, and changing the number of points aver-
aged for the DVM display.
HARDWARE SETUP
Jumpers
JP1, JP3
– Select the source for REF+ and REF–, re-
spectively. REF+ can be 5.00V from the onboard LT1236
reference (default) or supplied externally. REF– can be
ground (0V, default) or supplied externally.
JP2
– Select source for analog COM input, either tied to
ground or supplied externally to the COM turret post.
JP4 – JP6
– (CA0-CA2) Address select lines. Lines may
be 1, 0 or floating for a total of 27 different addresses.
The default setting is all 1s.
Connection to DC590 Serial Controller
J2 is the power and digital interface connector. Connect to
a DC590 serial controller with the supplied 14-conductor
ribbon cable. Digital signals are also connected to through-
hole test points on the circuit board.
Analog Connections
Analog signal connections are made via the row of turret
posts along the edge of the board. Also, if you are connect-
ing the board to an existing circuit, the exposed ground
planes along the edges of the board may be used to form
a solid connection between grounds.
dc1012af
2
DEMO MANUAL DC1012A
HARDWARE SETUP
GND
– Ground turrets are connected directly to the internal
analog ground plane.
PWR GND
– Power ground, connected to the power
return trace.
VCC
– This is the supply for the ADC. Do not draw any
power from this point. External power may be applied to
this point after disabling the V
CC
supply on DC590. See
the DC590 quick start guide for details.
REF+, REF–
– These turrets are connected to the
LTC2495/LTC2497/LTC2499 REF+ and REF– pins. If
the onboard reference is being used, the reference
voltage may be monitored from this point. An external
reference may be connected to these terminals if JP1
and JP3 are configured for external reference.
Note: The REF+ and REF– terminals are decoupled to
ground with 0.01μF and 4.7μF capacitors in parallel. Thus
any source connected to these terminals must be able to
drive a capacitive load and have very low impedance at
DC. Examples are series references that require an out-
put capacitor and C-Load™ stable op amps such as the
LT
®
1219 and LT1368.
CH0 – CH15
– These are the differential inputs to the
LTC2499/2497/2495. They may be configured as single-
ended inputs with respect to the COM pin, or as differential
inputs (CH0-1, CH2-3, etc.) with the polarity software
selected.
EXPERIMENTS
Input Noise
Solder a short wire between the CH0 and CH1 turrets.
Connect the inputs to ground through a short wire and
start taking data. LTC2499 noise should be approximately
0.12ppm of 5V (600nV
RMS
.) The electrical noise of the
LTC2497 is also 600nV
RMS
, however this is masked by the
76.3µV quantization level. If the input is midway between
code transitions, the noise level will read zero. If the input
is exactly on a code transition such that the two adjacent
output codes have equal probability, the noise level will
be approximately 7.9ppm. The input noise of the LTC2495
is apparent at very high gain settings (128 or 256.) Note
that with a 5V reference and gain set to 256, 1LSB is equal
to 298nV – which is lower than the 600nV
RMS
electrical
noise of the input stage.
Common Mode Rejection
Tie the two inputs (still connected together from previous
experiment) to ground through a short wire and note the
indicated voltage. Tie the inputs to REF+; the difference
should be less than 0.5μV due to the 140dB+ CMRR of
the LTC2499. The LTC2497 will produce less than 1LSB
difference.
dc1012af
Input Normal Mode Rejection
The LTC2499 and LTC2495 SINC4 digital filter can be
software selected to reject 50Hz, 60Hz by 110dB, or both
50Hz and 60Hz by 87dB. The LTC2497’s SINC4 filter is
fixed at 50Hz/60Hz. To measure input normal mode rejec-
tion, connect COM to a 2.5V source such as an LT1790-2.5
reference or a power supply. Connect any other input
(CH0-CH15) to the same supply through a 10k resistor.
Apply a 10Hz, 2V peak-to-peak sine wave to the input
through a 1µF capacitor.
Set the rejection frequency to 55Hz (LTC2499 only) and
start taking data. The input noise will be quite large, and
the graph of output vs. time should show large variations.
Next, slowly increase the frequency to 55Hz. The noise
should be almost undetectable in the graph.
3
DEMO MANUAL DC1012A
PARTS LIST
ITEM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DC1012A-A
1
DC1012A-B
1
DC1012A-C
1
1
U1
I.C., 16-BIT 8-/16-CHANNEL DELTA SIGMA ADCs LINEAR TECH., LTC2495CUHF 38QFN
1
U1
I.C., 16-BIT 8-/16-CHANNEL DELTA SIGMA ADCs LINEAR TECH., LTC2497CUHF 38QFN
1
U1
I.C., 24-BIT 8-/16-CHANNEL DELTA SIGMA ADCs LINEAR TECH., LTC2499CUHF 38QFN
QTY
4
2
1
3
1
26
0
6
6
1
2
3
1
1
1
REFERENCE
C3, C7, C10, C13
C11, C15
C29
C2, C9, C12
C8
TP1-TP6, TP8, TP10-TP12, TP14-TP27,
TP33
JP1-JP6
FOR (JP1-JP6)
J2
R1, R2
R8, R9, R10
R12
U4
U3
PART DESCRIPTION
CAP., CHIP X7R 0.01µF 16V
CAP., CHIP X7R 0.1µF 16V
CAP., CHIP X5R 1µF 10V
CAP., CHIP X5R 4.7µF 6.3V
CAP., CHIP X5R 10µF 6.3V
TURRET, TESTPOINT 0.064"
MANUFACTURER/PART NUMBER
AVX, 0603YC103KAT1A 0603
AVX, 0603YC104MAT1A 0603
TAIYO YUDEN, LMK107BJ105KA 0603
TAIYO YUDEN, JMK212BJ475MG 0805
TDK, C2012X5R0J106M 0805
MILL-MAX, 2308-2
TP7, TP9, TP13, TP28, TP29, TP30-TP32 Opt. (SURFACE MOUNT PAD ONLY )
HEADER, 3-PIN 1 ROW 0.079CC
SHUNT, 0.079" CENTER
HEADER, VERTICAL DUAL 2X7 0.079CC
RES., CHIP 0Ω
RES., CHIP 4.99k 1%
RES., CHIP 10k 5%
I.C., PRECISION REFERENCE SO8
I.C., SERIAL EEPROM, TSSOP-8
SAMTEC, TMM-103-02-L-S
SAMTEC, 2SN-BK-G
MOLEX, 87831-1420
VISHAY, CRCW06030000Z0EA
AAC, CR16-4991FM 0603
AAC, CR16-103JM 0603
LINEAR TECH., LT1236ACS8-5#PBF
MICROCHIP, 24LC025-I/ST (PbF)
dc1012af
4
DEMO MANUAL DC1012A
SCHEMATIC DIAGRAM
dc1012af
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
5