LT685CH datasheet, PDF - EEWORLD Datasheet

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LT685CH: Description比较器; Categorysemiconductor The comparator; File Size91KB，8 Pages; ManufacturerADI; Websitehttps://www.analog.com

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LT685CH Overview

比较器

LT685CH Parametric

Parameter Name	Attribute value
category
Maker	ADI
series	-
Package	Bulk
Basic product number	LT685

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LT685

High Speed Comparator

FEATURES

■

DESCRIPTIO

Ultrafast (5.5ns typ)

Complementary ECL Output

50Ω Line Driving Capability

Low Offset Voltage

Output Latch Capability

External Hysteresis Control

Pin Compatible with Am685

The LT

685 is an ultrafast comparator with differential

inputs and complementary outputs fully compatible with

ECL logic levels. The output current capability is adequate

for driving transmission lines terminated in 50Ω. The low

input offset and high resolution make this comparator

ideally suited for analog-to-digital signal processing

applications.

A latch function is provided to allow the comparator to be

used in a sample-hold mode. When the latch enable input

is ECL high, the comparator functions normally. When the

latch enable is driven low, the comparator outputs are

locked in their existing logical states. If the latch function

is not used, the latch enable must be connected to ground

or ECL high.

The device is pin-compatible with the Am685. Hysteresis

has been added to improve switching time with slow input

signals as well as to minimize oscillation. A single resistor

between the hysteresis pin and V

–

adds input hysteresis

voltage as more current is drawn. If hysteresis is not

required, the pin can be left unconnected.

, LTC and LT are registered trademarks of Linear Technology Corporation.

APPLICATIO S

■

High Speed A-to-D Converters

High Speed Sampling Circuits

Oscillators

TYPICAL APPLICATIO

Comparator with Hysteresis

100

GND1

GND2

LT685

HYSTERESIS

–

LATCH

ENABLE

–5.2V

LT685 • TA01

HYSTERESIS (mV)

–

100

200

Hysteresis

HYSTERESIS IS ZERO

IF PIN LEFT OPEN

500

RESISTANCE (Ω)

10k

LT685 • TA02

685fa

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