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LTC2240IUP-12#TRPBF

Description
12 位模数转换器 1 输入 1 管线 64-QFN(9x9)
Categorysemiconductor    ADC/DAC - professional data collection   
File Size546KB,30 Pages
ManufacturerADI
Websitehttps://www.analog.com
Environmental Compliance
Download Datasheet Parametric View All

LTC2240IUP-12#TRPBF Overview

12 位模数转换器 1 输入 1 管线 64-QFN(9x9)

LTC2240IUP-12#TRPBF Parametric

Parameter NameAttribute value
category
MakerADI
series-
PackageTape and Reel (TR)
Number of digits12
Sample rate (per second)170M
Number of inputs1
input typedifference
Data interfaceLVDS - parallel, parallel
ConfigurationS/H-ADC
Ratio - S/H:ADC1:1
Architecturepipeline
Reference typeoutside, inside
Voltage - Power Supply, Analog2.375V ~ 2.625V
Voltage - Power Supply, Digital2.375V ~ 2.625V
characteristic-
Operating temperature-40°C ~ 85°C
Package/casing64-WFQFN Exposed Pad
Supplier device packaging64-QFN(9x9)
Installation typesurface mount type
Number of A/D converters1
Basic product numberLTC2240
LTC2240-12
12-Bit, 170Msps ADC
FEATURES
n
n
n
n
n
n
n
n
n
n
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DESCRIPTION
The LTC
®
2240-12 is a 170Msps, sampling 12-bit A/D con-
verter designed for digitizing high frequency, wide dynamic
range signals. The LTC2240-12 is perfect for demanding
communications applications with AC performance that
includes 65.6dB SNR and 80dB SFDR. Ultralow jitter of
95fs
RMS
allows IF undersampling with excellent noise
performance.
DC specs include ±0.6LSB INL (typ), ±0.4LSB DNL (typ)
and no missing codes over temperature.
The digital outputs can be either differential LVDS, or
single-ended CMOS. There are three format options for
the CMOS outputs: a single bus running at the full data
rate or two demultiplexed buses running at half data rate
with either interleaved or simultaneous update. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 2.625V.
The ENC
+
and ENC
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL, or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance over a wide range of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
*LTC2220-1, LTC2220, LTC2221, LTC2230, LTC2231 are 3.3V parts.
n
Sample Rate: 170Msps
65.6dB SNR
80dB SFDR
1.2GHz Full Power Bandwidth S/H
Single 2.5V Supply
Low Power Dissipation: 445mW
LVDS, CMOS, or Demultiplexed CMOS Outputs
Selectable Input Ranges: ±0.5V or ±1V
No Missing Codes
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Data Ready Output Clock
Pin Compatible Family
250Msps: LTC2242-12 (12-Bit), LTC2242-10 (10-Bit)
210Msps: LTC2241-12 (12-Bit), LTC2241-10 (10-Bit)
170Msps: LTC2240-12 (12-Bit), LTC2240-10 (10-Bit)
185Msps: LTC2220-1 (12-Bit)*
170Msps: LTC2220 (12-Bit), LTC2230 (10-Bit)*
135Msps: LTC2221 (12-Bit), LTC2231 (10-Bit)*
64-Pin 9mm
×
9mm QFN Package
APPLICATIONS
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n
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Wireless and Wired Broadband Communication
Cable Head-End Systems
Power Amplifier Linearization
Communications Test Equipment
TYPICAL APPLICATION
2.5V
V
DD
REFH
REFL
FLEXIBLE
REFERENCE
0.5V
TO 2.625V
OV
DD
D11
D0
85
80
75
12-BIT
PIPELINED
ADC CORE
CMOS
OR
LVDS
SFDR (dBFS)
SFDR vs Input Frequency
+
ANALOG
INPUT
INPUT
S/H
70
65
1V RANGE
60
2V RANGE
55
50
45
40
0 100 200 300 400 500 600 700 800 900 1000
INPUT FREQUENCY (MHz)
224012 G11
CORRECTION
LOGIC
OUTPUT
DRIVERS
OGND
CLOCK/DUTY
CYCLE
CONTROL
224012 TA01
ENCODE
INPUT
224012fd
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