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- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
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-
© Nexperia B.V. (year). All rights reserved.
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PMZ250UN
N-channel TrenchMOS extremely low level FET
Rev. 01 — 21 February 2008
BOTTOM VIEW
Product data sheet
1. Product profile
1.1 General description
N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using
TrenchMOS technology.
1.2 Features
I
Profile 55 % lower than SOT23
I
Lower on-state resistance
I
Leadless package
I
Footprint 90 % smaller than SOT23
I
Low threshold voltage
I
Fast switching
1.3 Applications
I
Driver circuits
I
DC-to-DC converters
I
Load switching in portable appliances
1.4 Quick reference data
I
V
DS
≤
20 V
I
R
DSon
≤
300 mΩ
I
I
D
≤
2.28 A
I
P
tot
≤
2.50 W
2. Pinning information
Table 1.
Pin
1
2
3
Pinning
Description
gate (G)
source (S)
drain (D)
1
3
2
Transparent
top view
G
mbb076
Simplified outline
Symbol
D
SOT883 (SC-101)
S
NXP Semiconductors
PMZ250UN
N-channel TrenchMOS extremely low level FET
3. Ordering information
Table 2.
Ordering information
Package
Name
PMZ250UN
SC-101
Description
leadless ultra small plastic package; 3 solder lands;
body 1.0
×
0.6
×
0.5 mm
Version
SOT883
Type number
4. Limiting values
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the
ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A
or
equivalent standards.
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
V
esd
drain-source voltage
drain-gate voltage (DC)
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
electrostatic discharge voltage
T
sp
= 25
°C;
V
GS
= 4.5 V; see
Figure 2
and
3
T
sp
= 100
°C;
V
GS
= 4.5 V; see
Figure 2
T
sp
= 25
°C;
pulsed; t
p
≤
10
µs;
see
Figure 3
T
sp
= 25
°C;
see
Figure 1
-
-
T
sp
= 25
°C
T
sp
= 25
°C;
pulsed; t
p
≤
10
µs
all pins
human body model; C = 100pF; R = 1.5 kΩ
machine model; C = 200 pF
Conditions
25
°C ≤
T
j
≤
150
°C
25
°C ≤
T
j
≤
150
°C;
R
GS
= 20 kΩ
Min
-
-
-
-
-
-
-
−55
−55
-
-
-
-
-
60
30
V
V
Max
20
20
±8
2.28
1.44
4.56
2.50
+150
+150
2.28
4.56
Unit
V
V
V
A
A
A
W
°C
°C
A
A
Source-drain diode
Electrostatic discharge
PMZ250UN_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 21 February 2008
2 of 13
NXP Semiconductors
PMZ250UN
N-channel TrenchMOS extremely low level FET
120
P
der
(%)
80
003aac031
120
I
der
( %)
80
003aac033
40
40
0
0
50
100
150
T
sp
(°C)
200
0
0
50
100
150
T
sp
(°C)
200
P
tot
P
der
=
-----------------------
×
100
%
-
P
tot
(
25°C
)
Fig 1. Normalized total power dissipation as a
function of solder point temperature
10
2
I
D
(A)
10
I
D
I
der
=
-------------------
×
100
%
-
I
D
(
25°C
)
Fig 2. Normalized continuous drain current as a
function of solder point temperature
003aac202
Limit R
DSon
= V
DS
/ I
D
t
p
= 10
µs
100
µs
1
DC
1 ms
10 ms
100 ms
10
−1
10
−2
10
−1
1
10
V
DS
(V)
10
2
T
sp
= 25
°C;
I
DM
is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PMZ250UN_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 21 February 2008
3 of 13
NXP Semiconductors
PMZ250UN
N-channel TrenchMOS extremely low level FET
5. Thermal characteristics
Table 4.
R
th(j-sp)
R
th(j-a)
[1]
Thermal characteristics
Conditions
see
Figure 4
minimum footprint
[1]
Symbol Parameter
thermal resistance from junction to solder point
thermal resistance from junction to ambient
Min
-
-
Typ
-
670
Max
50
-
Unit
K/W
K/W
Mounted on a printed-circuit board; vertical in still air.
10
2
003aab831
Z
th(j-sp)
(K/W)
δ
= 0.5
0.2
10
0.1
0.05
0.02
single pulse
t
p
T
P
δ
=
t
p
T
t
1
10
-4
10
-3
10
-2
10
-1
1
t
p
(s)
10
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration
PMZ250UN_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 21 February 2008
4 of 13
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