DM74LS367AN datasheet, PDF - EEWORLD Datasheet

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DM74LS367AN: DescriptionHex 3-STATE Buffer/Bus Driver; Categorylogic logic; File Size42KB，4 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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DM74LS367AN Overview

Hex 3-STATE Buffer/Bus Driver

DM74LS367AN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Fairchild
Parts packaging code	DIP
package instruction	DIP, DIP16,.3
Contacts	16
Reach Compliance Code	unknown
Other features	ONE FUNCTION WITH TWO BITS
Control type	ENABLE LOW
series	LS
JESD-30 code	R-PDIP-T16
JESD-609 code	e0
length	19.305 mm
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.024 A
Number of digits	6
Number of functions	1
Number of ports	2
Number of terminals	16
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	24 mA
Prop。Delay @ Nom-Sup	16 ns
propagation delay (tpd)	25 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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DM74LS367A Hex 3-STATE Buffer/Bus Driver

August 1986

Revised March 2000

DM74LS367A

Hex 3-STATE Buffer/Bus Driver

General Description

This device contains six independent gates each of which

performs a non-inverting buffer function. The outputs have

the 3-STATE feature. When enabled, the outputs exhibit

the low impedance characteristics of a standard LS output

with additional drive capability to permit the driving of bus

lines without external resistors. When disabled, both the

output transistors are turned OFF presenting a high-imped-

ance state to the bus line. Thus the output will act neither

as a significant load nor as a driver. To minimize the possi-

bility that two outputs will attempt to take a common bus to

opposite logic levels, the disable time is shorter than the

enable time of the outputs.

Ordering Code:

Order Number

DM74LS367AM

DM74LS367AN

Package Number

M16A

N16E

Package Description

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Inputs

Output

Hi-Z

HIGH Logic Level

LOW Logic Level

Either LOW or HIGH Logic Level

Hi-Z

3-STATE (Outputs are disabled)

DS006429

www.fairchildsemi.com

DM74LS367AN Related Products

	DM74LS367AN	74LS367	DM74LS367A	DM74LS367	DM74LS367AM
Description	Hex 3-STATE Buffer/Bus Driver	Hex 3-STATE Buffer/Bus Driver	Hex 3-STATE Buffer/Bus Driver	Hex 3-STATE Buffer/Bus Driver	Hex 3-STATE Buffer/Bus Driver

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