DM74LS533 Octal Transparent Latch with 3-STATE Outputs
October 1988
Revised March 2000
DM74LS533
Octal Transparent Latch with 3-STATE Outputs
General Description
The DM74LS533 consists of eight latches with 3-STATE
outputs for bus organized system applications. The flip-
flops appear transparent to the data when Latch Enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup times is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH the bus
output is in the high impedance state. The DM74LS533 is
the same as the DM74LS373, except that the outputs are
inverted. For detailed specifications please see the
DM74LS373 data sheet, but note that the propagation
delays from data to output are 5.0 ns longer for the
DM74LS533 than for the DM74LS373.
Features
s
Eight latches in a single package
s
3-STATE outputs for bus interfacing
Ordering Code:
Order Number
DM74LS533WM
DM74LS533N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
V
CC
=
Pin 20
GND
=
Pin 10
Pin Descriptions
Pin Names
D0, D7
LE
OE
O0–O7
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
Complementary 3-STATE Outputs
Description
Function Table
OUTPUT
Enable
L
L
L
H
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
Z
=
High Impedance State
Q
O
=
Previous Condition of O
Latch
Enable
H
H
L
X
D
H
L
X
X
Output
O
L
H
Q
O
Z
© 2000 Fairchild Semiconductor Corporation
DS009811
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DM74LS533
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Free Air Operating Temperature
0
Parameter
Min
4.75
2
0.8
−2.6
24
70
Nom
5
Max
5.25
Units
V
V
V
mA
mA
°C
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CCZ
I
OZL
I
OZH
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit
Output Current
Supply Current
3-STATE Output Off
Current LOW
3-STATE Output Off
Current HIGH
Note 2:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 3:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max,
V
IL
=
Max
V
CC
=
Min, I
OL
=
Max,
V
IH
=
Min
I
OL
=
12 mA, V
CC
=
Min
V
CC
=
Max, V
I
=
7V
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.4V
V
CC
=
Max
(Note 3)
V
CC
=
Max
V
CC
=
V
CCH
V
OZL
=
0.4V
V
CC
=
V
CCH
V
OZH
=
2.7V
Min
Typ
(Note 2)
Max
−1.5
Units
V
V
2.4
3.4
0.35
0.5
0.4
0.1
20
−0.4
V
mA
µA
mA
mA
mA
µA
µA
−20
−100
46
−20.0
20.0
Switching Characteristics
V
CC
= +
5.0V, T
A
= +25°C
C
L
=
50 pF
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZL
t
PZH
t
PHZ
t
PLZ
Propagation Delay
Data to Q
x
Propagation Delay
LE to Q
x
Output Enable Time
OE to Q
x
Output Enable Time
OE to Q
x
Parameter
Min
R
L
=
2 kΩ
Max
23
23
30
25
22
20
20
25
ns
ns
ns
ns
Units
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DM74LS533
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
3
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DM74LS533 Octal Transparent Latch with 3-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
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2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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