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DM74LS86M

Description
LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14
Categorylogic    logic   
File Size57KB,5 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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DM74LS86M Overview

LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14

DM74LS86M Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP14,.25
Contacts14
Reach Compliance Codeunknow
seriesLS
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length8.65 mm
Logic integrated circuit typeXOR GATE
MaximumI(ol)0.008 A
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)15 mA
Prop。Delay @ Nom-Su23 ns
propagation delay (tpd)21 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
DM74LS86 Quad 2-Input Exclusive-OR Gate
August 1986
Revised March 2000
DM74LS86
Quad 2-Input Exclusive-OR Gate
General Description
This device contains four independent gates each of which
performs the logic exclusive-OR function.
Ordering Code:
Order Number
DM74LS86M
DM74LS86SJ
DM74LS86N
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y
=
A
B
=
A B
+
AB
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
B
L
H
L
H
Y
L
H
H
L
© 2000 Fairchild Semiconductor Corporation
DS006380
www.fairchildsemi.com

DM74LS86M Related Products

DM74LS86M 74LS86 DM74LS86N DM74LS86SJ DM74LS86
Description LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14 LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14 LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14 LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14 LS SERIES, QUAD 2-INPUT XOR GATE, PDIP14
series LS LS LS LS LS
Number of functions 4 4 4 4 4
Number of terminals 14 14 14 14 14
Maximum operating temperature 70 °C 70 Cel 70 °C 70 °C 70 Cel
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING THROUGH-HOLE THROUGH-HOLE GULL WING THROUGH-HOLE
Terminal location DUAL DUAL DUAL DUAL DUAL
Is it Rohs certified? incompatible - incompatible incompatible -
Maker Fairchild - Fairchild Fairchild -
Parts packaging code SOIC - DIP SOIC -
package instruction SOP, SOP14,.25 - DIP, DIP14,.3 SOP, SOP14,.3 -
Contacts 14 - 14 14 -
Reach Compliance Code unknow - unknow unknow -
JESD-30 code R-PDSO-G14 - R-PDIP-T14 R-PDSO-G14 -
JESD-609 code e0 - e0 e0 -
length 8.65 mm - 19.18 mm 10.2 mm -
Logic integrated circuit type XOR GATE - XOR GATE XOR GATE -
MaximumI(ol) 0.008 A - 0.008 A 0.008 A -
Number of entries 2 - 2 2 -
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code SOP - DIP SOP -
Encapsulate equivalent code SOP14,.25 - DIP14,.3 SOP14,.3 -
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE - IN-LINE SMALL OUTLINE -
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED -
power supply 5 V - 5 V 5 V -
Maximum supply current (ICC) 15 mA - 15 mA 15 mA -
Prop。Delay @ Nom-Su 23 ns - 23 ns 23 ns -
propagation delay (tpd) 21 ns - 21 ns 21 ns -
Certification status Not Qualified - Not Qualified Not Qualified -
Schmitt trigger NO - NO NO -
Maximum seat height 1.75 mm - 5.08 mm 2.1 mm -
Maximum supply voltage (Vsup) 5.25 V - 5.25 V 5.25 V -
Minimum supply voltage (Vsup) 4.75 V - 4.75 V 4.75 V -
Nominal supply voltage (Vsup) 5 V - 5 V 5 V -
surface mount YES - NO YES -
technology TTL - TTL TTL -
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal pitch 1.27 mm - 2.54 mm 1.27 mm -
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED -
width 3.9 mm - 7.62 mm 5.3 mm -
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