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DM74S133M

Description
13-Input NAND Gate
Categorylogic    logic   
File Size47KB,4 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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DM74S133M Overview

13-Input NAND Gate

DM74S133M Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP16,.25
Contacts16
Reach Compliance Codeunknow
seriesS
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length9.9 mm
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.02 A
Number of functions1
Number of entries13
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)10 mA
Prop。Delay @ Nom-Su10 ns
propagation delay (tpd)10 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
DM74S133 13-Input NAND Gate
August 1986
Revised April 2000
DM74S133
13-Input NAND Gate
General Description
This device contains a single gate which performs the logic
NAND function.
Ordering Code:
Order Number
DM74S133M
DM74S133N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y
=
ABCDEFGHIJKLM
Inputs
A thru M
All Inputs H
One or More
Input L
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
Y
L
H
© 2000 Fairchild Semiconductor Corporation
DS006462
www.fairchildsemi.com

DM74S133M Related Products

DM74S133M DM74S133N DM74S133
Description 13-Input NAND Gate 13-Input NAND Gate 13-Input NAND Gate
Is it Rohs certified? incompatible incompatible -
Maker Fairchild Fairchild -
Parts packaging code SOIC DIP -
package instruction SOP, SOP16,.25 DIP, DIP16,.3 -
Contacts 16 16 -
Reach Compliance Code unknow unknow -
series S S -
JESD-30 code R-PDSO-G16 R-PDIP-T16 -
JESD-609 code e0 e0 -
length 9.9 mm 19.305 mm -
Logic integrated circuit type NAND GATE NAND GATE -
MaximumI(ol) 0.02 A 0.02 A -
Number of functions 1 1 -
Number of entries 13 13 -
Number of terminals 16 16 -
Maximum operating temperature 70 °C 70 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code SOP DIP -
Encapsulate equivalent code SOP16,.25 DIP16,.3 -
Package shape RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE IN-LINE -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
power supply 5 V 5 V -
Maximum supply current (ICC) 10 mA 10 mA -
Prop。Delay @ Nom-Su 10 ns 10 ns -
propagation delay (tpd) 10 ns 10 ns -
Certification status Not Qualified Not Qualified -
Schmitt trigger NO NO -
Maximum seat height 1.75 mm 5.08 mm -
Maximum supply voltage (Vsup) 5.25 V 5.25 V -
Minimum supply voltage (Vsup) 4.75 V 4.75 V -
Nominal supply voltage (Vsup) 5 V 5 V -
surface mount YES NO -
technology TTL TTL -
Temperature level COMMERCIAL COMMERCIAL -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form GULL WING THROUGH-HOLE -
Terminal pitch 1.27 mm 2.54 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
width 3.9 mm 7.62 mm -

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