is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a)
55°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b) 145°C/W when mounted on a
minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs,
Duty Cycle < 2.0%
3. The diode connected between the gate
and source serves only as protection
againts ESD. No gate overvoltage
rating is implied.
FDM2452NZ Rev C1
FDM2452NZ
Typical Characteristics
40
35
I
D
, DRAIN CURRENT (A)
3.5V
2.0V
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 4.5V
2.5V
1.5
1.4
V
GS
= 2.0V
1.3
1.2
1.1
1
0.9
30
3.0V
25
20
15
10
1.5V
2.5V
3.0V
3.5V
4.0V
4.5V
5
0
0
0.5
1
1.5
2
2.5
V
DS
, DRAIN-SOURCE VOLTAGE (V)
0
5
10
15
20
25
30
35
40
I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.04
R
DS(ON)
, ON-RESISTANCE (OHM)
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 8.1A
V
GS
= 4.5V
1.4
I
D
= 4.0A
0.035
0.03
T
A
= 125
o
C
1.2
0.025
0.02
0.015
0.01
1
0.8
T
A
= 25
o
C
0.6
-50
-25
0
25
50
75
100
o
125
150
1
2
3
4
5
T
J
, JUNCTION TEMPERATURE ( C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
40
35
I
D
, DRAIN CURRENT (A)
30
125
o
C
25
20
15
10
5
0
0.5
1
1.5
2
2.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
S
, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
V
DS
= 5V
T
A
= -55 C
o
25
o
C
V
GS
= 0V
10
T
A
= 125
o
C
1
25
o
C
0.1
-55
o
C
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDM2452NZ Rev C1
FDM2452NZ
Typical Characteristics
5
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 8.1A
4
20V
3
CAPACITANCE (pF)
1600
V
DS
= 10V
15V
1400
1200
f = 1MHz
V
GS
= 0 V
C
iss
1000
800
600
400
200
2
1
C
oss
C
rss
0
0
4
8
Q
g
, GATE CHARGE (nC)
12
16
0
0
5
10
15
20
25
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
P(pk), PEAK TRANSIENT POWER (W)
R
DS(ON)
LIMIT
I
D
, DRAIN CURRENT (A)
100us
10
1ms
10ms
100ms
1s
10s
DC
0.1
V
GS
= 4.5V
SINGLE PULSE
R
θ
JA
= 145
o
C/W
T
A
= 25
o
C
0.01
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
50
Figure 8. Capacitance Characteristics.
40
SINGLE PULSE
R
θ
JA
= 145°C/W
T
A
= 25°C
30
1
20
10
0
0.001
0.01
0.1
1
t
1
, TIME (sec)
10
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1
D = 0.5
R
θJA
(t) = r(t) * R
θJA
R
θJA
=145 °C/W
P(pk)
t
1
t
2
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
SINGLE PULSE
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
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