DM9602 Dual Retriggerable, Resettable One Shots
August 1986
Revised February 2000
DM9602
Dual Retriggerable, Resettable One Shots
General Description
These dual resettable, retriggerable one shots have two
inputs per function; one which is active HIGH, and one
which is active LOW. This allows the designer to employ
either leading-edge or trailing-edge triggering, which is
independent of input transition times. When input condi-
tions for triggering are met, a new cycle starts and the
external capacitor is allowed to rapidly discharge and then
charge again. The retriggerable feature permits output
pulse widths to be extended. In fact a continuous true out-
put can be maintained by having an input cycle time which
is shorter than the output cycle time. The output pulse may
then be terminated at any time by applying a LOW logic
level to the RESET pin. Retriggering may be inhibited by
either connecting the Q output to an active HIGH input, or
the Q output to an active LOW input.
Features
s
70 ns to
∞
output width range
s
Resettable and retriggerable—0% to 100% duty cycle
s
TTL input gating—leading or trailing edge triggering
s
Complementary TTL outputs
s
Optional retrigger lock-out capability
s
Pulse width compensated for V
CC
and temperature vari-
ations
Ordering Code:
Order Number
DM9602N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Logic Diagrams
Function Table
Pin Numbers
A
H→L
H
X
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Don’t Care
B
L
L→H
X
CLR
H
H
L
Operation
Trigger
Trigger
Reset
© 2000 Fairchild Semiconductor Corporation
DS006611
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DM9602
Operating Rules
1. An external resistor (R
X
) and external capacitor (C
X
)
are required as shown in the Logic Diagram.
2. The value of C
X
may vary from 0 to any necessary
value available. If, however, the capacitor has leakages
approaching 3.0
µA
or if stray capacitance from either
terminal to ground is more than 50 pF, the timing equa-
tions may not represent the pulse width obtained.
3. The output pulse with (t) is defined as follows:
6. Under any operating condition, C
X
and R
X
(min) must
be kept as close to the circuit as possible to minimize
stray capacitance and reduce noise pickup.
7. Input Trigger Pulse Rules (See Triggering Truth Table)
This configuration is not recommended with retriggerable opera-
tion.
5. To obtain variable pulse width by remote trimming, the
following circuit is recommended:
where:
R
X
is in kΩ, C
X
is in pF
t is in ns
for C
X
<
10
3
pF, see Figure 1.
for K vs. C
X
see Figure 6.
4. If electrolytic type capacitors are to be used, the follow-
ing three configurations are recommended:
1. Use with low leakage capacitors:
The normal RC configuration can be used predict-
ably only if the forward capacitor leakage at 5.0V is
less than 3
µA,
and the inverse capacitor leakage
at 1.0V is less than 5
µA
over the operational tem-
perature range.
Input to Pin 5(11),
Pin 4(12)
=
LOW
(Pin 3(13)
=
HIGH)
t
1
, t
3
=
Min. Positive Input Pulse Width
>
40 ns
t
2
, t
4
=
Min. Negative Input Pulse Width
>
40 ns
Input to Pin 4(12)
R
<
0.6 R
X
(Max)
Pin 5(11)
=
HIGH
(Pin 3(13)
=
HIGH)
2. Use with high inverse leakage current electrolytic
capacitors:
The diode in this configuration prevents high
inverse leakage currents through the capacitor by
preventing an inverse voltage across the capacitor.
The use of this configuration is not recommended
with retriggerable operation.
t
≈
0.3 RC
X
8. The retriggerable pulse width is calculated as shown
below:
The retrigger pulse width is equal to the pulse width (t) plus a delay
time. For pulse widths greater than 500 ns, t
W
can be approximated as
t. Retriggering will not occur if the retrigger pulse comes within
≈
0.3
C
X
(ns) after the initial trigger pulse (i.e., during the discharge cycle).
3. Use to obtain extended pulse widths:
This configuration can be used to obtain extended
pulse widths, because of the larger timing resistor
allowed by beta multiplication. Electrolytics with
high inverse leakage currents can be used.
R
<
R
X
(0.7) (h
FE
Q1) or
<
2.5 MΩ, whichever is the
lesser
R
X
(min)
<
R
Y
<
R
X
(max)
(5 kΩ
≤
R
Y
≤
10 kΩ is recommended)
Q1: NPN silicon transistor with h
FE
requirements of
above equations, such as 2N5961 or 2N5962.
t
≈
0.3 RC
X
9. Reset Operation—An overriding clear (active LOW
level) is provided on each one shot. By applying a LOW
to the reset, any timing cycle can be terminated or any
new cycle inhibited until the LOW reset input is
removed. Trigger inputs will not produce spikes in the
output when the reset is held LOW.
10. V
CC
and Ground wiring should conform to good high
frequency standards so that switching transients on
V
CC
and Ground leads do not cause interaction
between one shots. Use of a 0.01 to 0.1
µF
bypass
capacitor between V
CC
and Ground located near the
DM9602 is recommended.
Note 1:
For further detailed device characteristics and output performance,
please refer to the NSC one-shot application note, AN-366.
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2
DM9602
Absolute Maximum Ratings
(Note 2)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
5.5V
0°C to
+70°C
−65°C
to
+150°C
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
Supply Voltage
HIGH Level
Input Voltage
T
A
= −55°C
T
A
=
0°C
T
A
=
25°C
T
A
=
75°C
T
A
=
125°C
V
IL
LOW Level
Input Voltage
T
A
= −55°C
T
A
=
0°C
T
A
=
25°C
T
A
=
75°C
T
A
=
125°C
I
OH
I
OL
T
A
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
0
−0.8
16
75
mA
mA
°C
0.85
0.85
0.85
V
1.9
1.8
1.65
V
Parameter
Min
4.75
Nom
5
Max
5.25
Units
V
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
I
IH
I
IL
I
OS
I
CC
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
HIGH Level Input Current
LOW Level
Input Current
Short Circuit Output Current
Supply Current
Conditions (Note 3)
V
CC
=
Min, I
I
= −12
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min (Note 5)
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min (Note 5)
V
CC
=
Max, V
I
=
4.5V
V
CC
=
Max
V
CC
=
Min
V
CC
=
Max
V
I
=
0.45V
V
I
=
0.45V
39
60
−1.6
−1.41
−35
50
2.4
0.45
Min
Typ
(Note 4)
Max
−1.5
Units
V
V
V
µA
mA
mA
mA
V
CC
=
Max, V
OUT
=
1V (Note 5)(Note 6)
Note 3:
Unless otherwise noted, R
X
=
10k for all tests.
Note 4:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 5:
Ground PIN 1(15) for V
OL
on PIN 7(9) or V
OH
and I
OS
on PIN 6(10) and apply momentary ground to PIN 4(12). Open PIN 1(15) for V
OL
on PIN 6(10)
or V
OH
and I
OS
on PIN 7(9).
Note 6:
Not more than one output should be shorted at a time.
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