PIC32MK1024GPK064-E/PT datasheet, PDF

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PIC32MK1024GPK064-E/PT: DescriptionMIPS32® microAptiv™ series 微控制器 IC 32-位 120MHz 1MB（1M x 8）闪存 64-TQFP（10x10）; Categorysemiconductor The embedded processor and controller; File Size9MB，724 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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PIC32MK1024GPK064-E/PT Overview

MIPS32® microAptiv™ series 微控制器 IC 32-位 120MHz 1MB（1M x 8）闪存 64-TQFP（10x10）

PIC32MK1024GPK064-E/PT Parametric

Parameter Name	Attribute value
category
Maker	Microchip
series	PIC® 32MK
Package	tray
core processor	MIPS32® microAptiv™
Kernel specifications	32-bit
speed	120MHz
Connectivity	I²C，IrDA，LINbus，PMP，SPI，UART/USART，USB OTG
Peripheral	Undervoltage detection/reset, DMA, I²S, POR, PWM, WDT
Number of I/Os	49
Program storage capacity	1MB（1M x 8）
Program memory type	flash memory
EEPROM capacity	4K x 8
RAM size	256K x 8
Voltage - Power supply (Vcc/Vdd)	2.3V ~ 3.6V
data converter	A/D 26x12b; D/A 3x12b
Oscillator type	internal
Operating temperature	-40°C ~ 125°C（TA）
Installation type	surface mount type
Package/casing	64-TQFP
Supplier device packaging	64-TQFP（10x10）
Basic product number	PIC32MK1024GPK064

User Manual

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PIC32MK GENERAL PURPOSE AND

MOTOR CONTROL (GP/MC) FAMILY

32-bit General Purpose and Motor Control Application MCUs with FPU and

up to 1 MB Live-Update Flash, 256 KB SRAM, 4 KB EEPROM, and Op amps

Operating Conditions: 2.2V to 3.6V

• -40ºC to +85ºC, DC to 120 MHz

• -40ºC to +125ºC, DC to 80 MHz

Security Features

• Advanced Memory Protection:

- Peripheral and memory region access control

Core: 120 MHz (up to 198 DMIPS)

•

microAptiv™ MCU core with Floating Point Unit

• microMIPS™ mode for up to 40% smaller code size

• DSP-enhanced core:

- Four 64-bit accumulators

- Single-cycle MAC, saturating and fractional math

• Code-efficient (C and Assembly) architecture

• Two 32-bit core register files to reduce interrupt latency

MIPS32

Advanced Analog Features

• 12-bit ADC module:

- Sum of all individual ADC's combined, 25.45 Msps 12-bit mode

or 33.79 Msps 8-bit mode

- 7 individual ADC modules

- 3.75 Msps per S&H with dedicated DMA

- Up to 42 analog inputs

• Flexible and independent ADC trigger sources

• Four Op amps and five Comparators

• Up to three 12-bit CDACs

• Internal temperature sensor ±2ºC accuracy

• Capacitive Touch Divider (CVD)

Clock Management

• 8 MHz ±5% (FRC) internal oscillator 0ºC to +70ºC

• Programmable PLLs and oscillator clock sources:

- HS and EC clock modes

• Secondary USB PLL

• 32 kHz Internal Low-power RC oscillator (LPRC)

• Independent external low-power 32 kHz crystal oscillator

• Fail-Safe Clock Monitor (FSCM)

• Independent Watchdog Timers (WDT) and Deadman Timer (DMT)

• Fast wake-up and start-up

• Four Fractional clock out (REFCLKO) modules

Communication Interfaces

• Up to four CAN modules (with dedicated DMA channels):

- 2.0B Active with DeviceNet™ addressing support

• Up to six UART modules (up to 25 Mbps):

- Supports LIN 1.2 and IrDA

protocols

• Six SPI/I

S modules (SPI 50 Mbps)

• Parallel Master Port (PMP)

• Up to two FS USB 2.0-compliant On-The-Go (OTG) controllers

• Peripheral Pin Select (PPS) to enable remappable pin functions

Power Management

• Low-power management modes (Deep Sleep, Sleep, and Idle)

• Integrated:

- Power-on Reset (POR) and Brown-out Reset (BOR)

• On-board capacitorless regulator

Timers/Output Compare/Input Capture/RTCC

• Up to 14 16-bit or one 16-bit and eight 32-bit timers/counters for GP

and MC devices and six additional QEI 32-bit timers for MC devices

• 16 Output Compare (OC) modules

• 16 Input Capture (IC) modules

• PPS to enable function remap

• Real-Time Clock and Calendar (RTCC) module

Motor Control PWM

•

Eight PWM pairs

Six additional Single-Ended PWM modules

Dead Time for rising and falling edges

Dead-Time Compensation

8.33 ns PWM Resolution

Clock Chopping for High-Frequency Operation

PWM Support for:

- DC/DC, AC/DC, inverters, PFC, lighting

- BLDC, PMSM, ACIM, SRM motors

• Choice of six Fault and Current Limit Inputs

• Flexible Trigger Configuration for ADC Triggering

Input/Output

•

5V-tolerant pins with up to 22 mA source/sink

Selectable internal open drain, pull-ups, and pull-downs

External interrupts on all I/O pins

Five programmable edge/level-triggered interrupt pins

Qualification and Class B Support

•

AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) (planned)

Class B Safety Library, IEC 60730 (planned)

Back-up internal oscillator

Clock monitor with back-up internal oscillator

Global register locking

Motor Encoder Interface

• Six Quadrature Encoder Interface (QEI) modules:

- Four inputs: Phase A, Phase B, Home, and Index

Audio/Graphics/Touch Interfaces

•

External Graphics interfaces through PMP

Up to six I

S audio data communication interfaces

Up to six SPI audio control interfaces

Programmable audio master clock:

- Generation of fractional clock frequencies

- Can be synchronized with USB clock

- Can be tuned in run-time

Debugger Development Support

•

In-circuit and in-application programming

2-wire or 4-wire MIPS

Enhanced JTAG interface

Unlimited software and 12 complex breakpoints

IEEE 1149.2-compatible (JTAG) boundary scan

Non-intrusive hardware-based instruction trace

Unique Features

• Permanent non-volatile 4-word unique device serial number

Software and Tools Support

•

C/C++ compiler with native DSP/fractional support

MPLAB

Harmony Integrated Software Framework

TCP/IP, USB, Graphics, and mTouch™ middleware

MFi, Android™ and Bluetooth

audio frameworks

RTOS Kernels: Express Logic ThreadX, FreeRTOS™,

OPENRTOS

, Micriµm

µC/OS™, and SEGGER embOS

Direct Memory Access (DMA)

• Up to eight channels with automatic data size detection

• Programmable Cyclic Redundancy Check (CRC)

• Up to 64 KB transfers



2016-2019 Microchip Technology Inc.

DS60001402G-page 1

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