These depletion-mode (normally-on) transistors utilize an ad-
vanced vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transis-
tors and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Applications
❏
Normally-on switches
❏
Solid state relays
❏
Converters
❏
Constant current sources
❏
Power supply circuits
❏
Telecom
Package Options
D
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
Distance of 1.6 mm from case for 10 seconds.
BV
DSX
BV
DGX
±
20V
-55°C to +150°C
300°C
G
D
S
TO-243AA
(SOT-89)
SGD
TO-92
Note:
See Package Outline section for dimensions.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
1
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
DN3545
Thermal Characteristics
Package
TO-92
TO-243AA
†
I
D
(continuous)*
136mA
200mA
I
D
(pulsed)
1.6A
300mA
Power Dissipation
@ T
A
= 25
°
C
0.74W
1.6
†
θ
jc
°
C/W
125
15
θ
ja
°
C/W
170
78
†
I
DR
*
136mA
200mA
I
DRM
1.6A
300mA
*
I
D
(continuous) is limited by max rated T
j
.
Mounted on FR4 board, 25mm x 25mm x 1.57mm. Significant P
D
increase possible on ceramic substrate.
Electrical Characteristics
(@ 25°C unless otherwise specified)
Symbol
BV
DSX
V
GS(OFF)
∆V
GS(OFF)
I
GSS
I
D(OFF)
Parameter
Drain-to-Source
Breakdown Voltage
Gate-to-Source OFF Voltage
Change in V
GS(OFF)
with Temperature
Gate Body Leakage Current
Drain-to-Source Leakage Current
Min
450
–1.5
–3.5
4.5
100
1.0
1.0
I
DSS
R
DS(ON)
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Saturated Drain-to-Source Current
Static Drain-to-Source
ON-State Resistance
Change in R
DS(ON)
with Temperature
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward Voltage Drop
Reverse Recovery Time
800
150
360
40
15
20
30
30
40
1.8
V
ns
ns
V
DD
= 25V,
I
D
= 150mA,
R
GEN
= 25Ω,
V
GS
= 0V to -10V
V
GS
= -5V, I
SD
= 150mA
V
GS
= -5V, I
SD
= 150mA
pF
200
20
1.1
Typ
Max
Unit
V
V
mV/°C
nA
µA
mA
mA
Ω
%/°C
m
Conditions
V
GS
= -5V, I
D
= 100µA
V
DS
= 25V, I
D
= 10µA
V
DS
= 25V, I
D
= 10µA
V
GS
=
±
20V, V
DS
= 0V
V
GS
= -5V, V
DS
= Max Rating
V
GS
= -5V, V
DS
= 0.8 Max Rating
T
A
= 125°C
V
GS
= 0V, V
DS
= 15V
V
GS
= 0V, I
D
= 150mA
V
GS
= 0V, I
D
= 150mA
I
D
= 100mA, V
DS
= 10V
V
GS
= -5V, V
DS
= 25V
f = 1 MHz
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
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