5962-9218301MCA datasheet, PDF

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5962-9218301MCA: DescriptionInverter, ACT Series, 6-Func, 1-Input, CMOS, CDIP14, CERAMIC, DIP-14; Categorylogic logic; File Size126KB，19 Pages; Manufacturere2v technologies

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5962-9218301MCA Overview

Inverter, ACT Series, 6-Func, 1-Input, CMOS, CDIP14, CERAMIC, DIP-14

5962-9218301MCA Parametric

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	compliant
series	ACT
JESD-30 code	R-GDIP-T14
JESD-609 code	e0
length	19.43 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	INVERTER
MaximumI(ol)	0.024 A
Number of functions	6
Number of entries	1
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	12.5 ns
propagation delay (tpd)	9.5 ns
Certification status	Qualified
Schmitt trigger	YES
Filter level	MIL-STD-883
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Changes in accordance with NOR 5962-R034-98.

DATE (YR-MO-DA)

98-02-18

APPROVED

Monica L. Poelking

Make corrections to waveforms. Update boilerplate. - CFS

00-06-12

Monica L. Poelking

Remove input edge rate from characterization in 1.4. Update boilerplate to

MIL-PRF-38535 requirements. Editorial changes throughout – jak.

03-10-28

Thomas M. Hess

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Wanda L. Meadows

CHECKED BY

Thomas J. Riccuiti

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216

http://www.dscc.dla.mil

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

APPROVED BY

Monica L. Poelking

DRAWING APPROVAL DATE

93-04-09

REVISION LEVEL

MICROCIRCUIT, DIGITAL, ADVANCED CMOS,

HEX INVERTER WITH SCHMITT TRIGGER,

TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

SIZE

CAGE CODE

SHEET

67268

5962-92183

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

5962-E563-03

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the

issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the

solicitation.

SPECIFICATION

DEPARTMENT OF DEFENSE

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

STANDARDS

DEPARTMENT OF DEFENSE

MIL-STD-883 -

MIL-STD-1835 -

HANDBOOKS

DEPARTMENT OF DEFENSE

MIL-HDBK-103 -

MIL-HDBK-780 -

List of Standard Microcircuit Drawings.

Standard Microcircuit Drawings.

Test Method Standard Microcircuits.

Interface Standard Electronic Component Case Outlines.

(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization

Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein.

Unless otherwise specified, the issues of the documents which are DoD adopted, are those listed in the issue of the DoDISS

cited in the solicitation. Unless otherwise specified, the issues of the documents not listed in the DoDISS are the issues of the

documents cited in the solicitation.

ELECTRONIC INDUSTRIES ALLIANCE (EIA)

EIA/JEDEC Standard No. 78 - IC Latch-Up Test

JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed

CMOS Devices.

(Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard,

Arlington, VA 22201-3834.)

(Non-Government standards and other publications are normally available from the organizations that prepare or distribute the

documents. These documents may also be available in or through libraries or other informational services.)

2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for

device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified

herein.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-92183

SHEET

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table. The truth table shall be as specified on figure 2.

3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.

3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on

figure 4.

3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5.

3.2.7 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document

revision level control and shall be made available to the preparing or acquiring activity upon request.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full

case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are defined in table I.

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as

listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the

manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still

be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in

accordance with MIL-PRF-38535, appendix A.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed

manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance

shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The

certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the

manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the

requirements of MIL-PRF-38535, appendix A and herein.

3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or

for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

3.8 Notification of change for device class M. For device class M notification to DSCC-VA of change of product (see 6.2

herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.

3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option

to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore

at the option of the reviewer.

3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group

number 36 (see MIL-PRF-38535, appendix A).

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-92183

SHEET

5962-9218301MCA Related Products

	5962-9218301MCA	5962-9218301MDA	5962-9218301M2A
Description	Inverter, ACT Series, 6-Func, 1-Input, CMOS, CDIP14, CERAMIC, DIP-14	Inverter, ACT Series, 6-Func, 1-Input, CMOS, CDFP14, CERPACK-14	Inverter, ACT Series, 6-Func, 1-Input, CMOS, CQCC20, CERAMIC, LCC-20
Parts packaging code	DIP	DFP	QLCC
package instruction	DIP, DIP14,.3	DFP, FL14,.3	QCCN, LCC20,.35SQ
Contacts	14	14	20
Reach Compliance Code	compliant	compliant	compliant
series	ACT	ACT	ACT
JESD-30 code	R-GDIP-T14	R-GDFP-F14	S-CQCC-N20
JESD-609 code	e0	e0	e0
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	INVERTER	INVERTER	INVERTER
MaximumI(ol)	0.024 A	0.024 A	0.024 A
Number of functions	6	6	6
Number of entries	1	1	1
Number of terminals	14	14	20
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DFP	QCCN
Encapsulate equivalent code	DIP14,.3	FL14,.3	LCC20,.35SQ
Package shape	RECTANGULAR	RECTANGULAR	SQUARE
Package form	IN-LINE	FLATPACK	CHIP CARRIER
power supply	5 V	5 V	5 V
Prop。Delay @ Nom-Sup	12.5 ns	12.5 ns	12.5 ns
propagation delay (tpd)	9.5 ns	9.5 ns	9.5 ns
Certification status	Qualified	Qualified	Qualified
Schmitt trigger	YES	YES	YES
Filter level	MIL-STD-883	MIL-STD-883	MIL-STD-883
Maximum seat height	5.08 mm	2.032 mm	1.905 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	NO	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	THROUGH-HOLE	FLAT	NO LEAD
Terminal pitch	2.54 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	QUAD
width	7.62 mm	6.2865 mm	8.89 mm
Base Number Matches	1	1	1
length	19.43 mm	-	8.89 mm

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