S29GL064S90TFI023 datasheet, PDF

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S29GL064S90TFI023: DescriptionFLASH - NOR 存储器 IC 64Mb（8M x 8，4M x 16）并联 90 ns 56-TSOP; Categorysemiconductor memory; File Size3MB，107 Pages; ManufacturerCypress Semiconductor; Environmental Compliance

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S29GL064S90TFI023 Overview

FLASH - NOR 存储器 IC 64Mb（8M x 8，4M x 16）并联 90 ns 56-TSOP

S29GL064S90TFI023 Parametric

Parameter Name	Attribute value
category
Maker	Cypress Semiconductor
series	Automotive, AEC-Q100, GL-S
Package	Tape and Reel (TR)
memory type	non-volatile
memory format	flash memory
technology	FLASH - NOR
storage	64Mb（8M x 8，4M x 16）
memory interface	in parallel
Write cycle time - words, pages	60ns
interview time	90 ns
Voltage - Power supply	2.7V ~ 3.6V
Operating temperature	-40°C ~ 85°C（TA）
Installation type	surface mount type
Package/casing	56-TFSOP (0.724", 18.40mm wide)
Supplier device packaging	56-TSOP
Basic product number	S29GL064

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Please note that Cypress is an Infineon Technologies Company.

The document following this cover page is marked as “Cypress” document as this is the

company that originally developed the product. Please note that Infineon will continue

to offer the product to new and existing customers as part of the Infineon product

portfolio.

Continuity of document content

The fact that Infineon offers the following product as part of the Infineon product

portfolio does not lead to any changes to this document. Future revisions will occur

when appropriate, and any changes will be set out on the document history page.

Continuity of ordering part numbers

Infineon continues to support existing part numbers. Please continue to use the

ordering part numbers listed in the datasheet for ordering.

www.infineon.com

S29GL064S

General Description

The S29GL-S mid density family of devices are 3.0-volt single-power flash memory manufactured using 65 nm MirrorBit technology.

The S29GL064S is a 64-Mb device organized as 4,194,304 words or 8,388,608 bytes. Depending on the model number, the devices

have 16-bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input.

The devices can be programmed either in the host system or in standard EPROM programmers.

Access times as fast as 70 ns are available. Note that each access time has a specific operating voltage range (V

) as specified in

the

Product Selector Guide

and

Ordering Information.

Package offerings include 48-pin TSOP, 56-pin TSOP, 48-ball fine-pitch BGA,

and 64-ball Fortified BGA, depending on model number. Each device has separate chip enable (CE#), write enable (WE#) and

output enable (OE#) controls.

Each device requires only a

single 3.0-volt power supply

for both read and write functions. In addition to a V

input, a high-

voltage

accelerated program (ACC)

feature is supported through increased voltage on the WP#/ACC or ACC input. This feature is

intended to facilitate system production.

The device is entirely command set compatible with the

JEDEC single-power-supply flash standard.

Commands are written to

the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the

programming and erase operations.

The

sector erase architecture

allows memory sectors to be erased and reprogrammed without affecting the data contents of other

sectors. The device is fully erased when shipped from the factory.

The

Advanced Sector Protection

features several levels of sector protection, which can disable both the program and erase

operations in certain sectors. Persistent Sector Protection is a method that replaces the previous 12-volt controlled protection

method. Password Sector Protection is a highly sophisticated protection method that requires a password before changes to certain

sectors are permitted.

Device programming and erasure are initiated through command sequences. Once a program or erase operation begins, the host

system need only poll the DQ7 (Data# Polling) or DQ6 (toggle)

status bits

or monitor the

Ready/Busy# (RY/BY#)

output to

determine whether the operation is complete. To facilitate programming, an

Unlock Bypass

mode reduces command sequence

overhead by requiring only two write cycles to program data instead of four.

Hardware data protection

measures include a low V

detector that automatically inhibits write operations during power

transitions. The hardware sector protection feature disables both program and erase operations in any combination of sectors of

memory. This can be achieved in-system or via programming equipment.

The

Erase Suspend / Erase Resume

feature allows the host system to pause an erase operation in a given sector to read or

program any other sector and then complete the erase operation. The

Program Suspend / Program Resume

feature enables the

host system to pause a program operation in a given sector to read any other sector and then complete the program operation.

The

hardware RESET# pin

terminates any operation in progress and resets the device, after which it is then ready for a new

operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the

host system to read boot-up firmware from the flash memory device.

The device reduces power consumption in the

standby mode

when it detects specific voltage levels on CE# and RESET#, or when

addresses are stable for a specified period of time.

The

Write Protect (WP#)

feature protects the first or last sector by asserting a logic low on the WP#/ACC pin or WP# pin, depending

on model number. The protected sector is still protected even during accelerated programming.

The

Secure Silicon Region

provides a 128-word / 256-byte area for code or data that can be permanently protected. Once this

sector is protected, no further changes within the sector can occur.

Cypress MirrorBit flash technology combines years of flash memory manufacturing experience to produce the highest levels of

quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted

erase. The data is programmed using hot electron injection.

Document Number: 001-98286 Rev. *H

Page 2 of 106

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