DATA SHEET
SILICON POWER TRANSISTOR
2SB548, 549/2SD414, 415
PNP/NPN SILICON EPITAXIAL TRANSISTOR
FOR LOW-FREQUENCY POWER AMPLIFIERS
FEATURES
• Ideal for audio amplifier drivers with 30 W to 50 W output
• High voltage
• Available for small mount spaces due to small and thin package
• Easy to be attached to radiators
PACKAGE DRAWING (UNIT: mm)
ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
°
Parameter
Collector to base voltage
Collector to emitter voltage
Emitter to base voltage
Collector current
Collector current
Total power dissipation
Total power dissipation
Junction temperature
Storage temperature
Symbol
V
CBO
V
CEO
V
EBO
I
C(DC)
I
C(pulse)
*
P
T
(Ta = 25°C)
P
T
(Tc = 25°C)
T
j
T
stg
2SB548/
2SD414
−80/80
2SB549/
2SD415
−100/100
Unit
V
V
V
A
A
W
W
°C
°C
Electrode Connection
−100/120
−5.0/5.0
−0.8/0.8
−1.5/1.5
1.0
10
150
−55
to +150
* PW
≤
10 ms, duty cycle
≤
50%
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
°
Parameter
Collector cutoff current
Emitter cutoff current
DC current gain
DC current gain
Collector saturation voltage
Base saturation voltage
Gain bandwidth product
Collector capacitance
Symbol
I
CBO
I
EBO
h
FE1
h
FE2
V
CE(sat)
V
BE(sat)
f
T
C
ob
Conditions
V
CB
=
−80/80
V, I
E
= 0
V
EB
=
−3.0/3.0
V, I
C
= 0
V
CE
=
−5.0/5.0
V, I
C
=
−2.0/2.0
mA*
V
CE
=
−5.0/5.0
V, I
C
=
−200/200
mA*
I
C
=
−500/500
mA, I
B
=
−50/50
mA*
I
C
=
−500/500
mA, I
B
=
−50/50
mA*
V
CE
=
−5.0/5.0
V, I
C
=
−100/100
mA
V
CB
=
−10/10
V, I
E
= 0, f = 1.0 MHz
20
40
90
−0.4/0.3
−0.9/0.9
70/45
25/15
320
−2.0/2.0
−1.5/1.5
V
V
MHz
pF
MIN.
TYP.
MAX.
−1.0/1.0
−1.0/1.0
Unit
µ
A
µ
A
*
Pulse test PW
≤
350
µ
s, duty cycle
≤
2%
h
FE2
CLASSIFICATION
Marking
h
FE2
S
40 to 80
R
60 to 120
Q
100 to 200
P
160 to 320
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D16141EJ2V0DS00
Date Published April 2002 N CP(K)
Printed in Japan
©
2002
1998
2SB548, 549/2SD414, 415
TYPICAL CHARACTERISTICS (Ta = 25°C)
°
Note
Total Power Dissipation P
T
(W)
Note
1. 1 mm aluminum board
for heatsink
2. No insulating board
3. Silicon grease coating
4. Horizontal level
With infinite heatsink
Without te heatsink
Temperature T (°C)
Derating dT (%)
Case Temperature Tc (°C)
Collector Current I
C
(A)
Note
1. Tc = 25
°C
2. Derate the dissipation limited
area by case temperature and
duty cycle.
3. S/b limited area is a single
pulse. Derate this area by case
temperature.
Collector Current I
C
(A)
Note
1. Tc = 25
°C
2. Derate the dissipation limited
area by case temperature and
duty cycle.
3. S/b limited area is a single
pulse. Derate this area by
Collector to Emitter Voltage V
CE
(V)
Collector to Emitter Voltage V
CE
(V)
Transient Thermal Resistance
∆
R
th
(
°
C/W)
Collector Current I
C
(A)
Pulse Width PW (ms)
Collector to Emitter Voltage V
CE
(V)
2
Data Sheet D16141EJ2V0DS
2SB548, 549/2SD414, 415
•
The information in this document is current as of July, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
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written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
•
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third parties by or arising from the use of NEC semiconductor products listed in this document or any other
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patents, copyrights or other intellectual property rights of NEC or others.
•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer's equipment shall be done under the full
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parties arising from the use of these circuits, software and information.
•
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
risks of damage to property or injury (including death) to persons arising from defects in NEC
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•
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