JS28F128J3F75B datasheet, PDF - EEWORLD Datasheet

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JS28F128J3F75B: DescriptionFLASH - NOR 存储器 IC 128Mb 并联 75 ns 56-TSOP; Categorysemiconductor memory; ManufacturerAlliance Memory; Environmental Compliance

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JS28F128J3F75B Overview

FLASH - NOR 存储器 IC 128Mb 并联 75 ns 56-TSOP

JS28F128J3F75B Parametric

Parameter Name	Attribute value
category
Maker	Alliance Memory
series	-
Package	卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带
memory type	non-volatile
memory format	flash memory
technology	FLASH - NOR
storage	128Mb
memory organization	16M x 8，8M x 16
memory interface	in parallel
Write cycle time - words, pages	75ns
interview time	75 ns
Voltage - Power supply	2.7V ~ 3.6V
Operating temperature	-40°C ~ 85°C（TA）
Installation type	surface mount type
Package/casing	56-TFSOP (0.724", 18.40mm wide)
Supplier device packaging	56-TSOP
Basic product number	JS28F128J3

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Numonyx

Embedded Flash Memory (J3 65

nm) Single Bit per Cell (SBC)

32, 64, and 128 Mbit

Datasheet

Product Features

Architecture

— Symmetrical 128-KB blocks

— 128 Mbit (128 blocks)

— 64 Mbit (64 blocks)

— 32 Mbit (32 blocks)

— Blank Check to verify an erased block

Performance

— Initial Access Speed: 75ns

— 25 ns 8-word Asynchronous page-mode

reads

— 256-Word write buffer for x16 mode, 256-

Byte write buffer for x8 mode;

1.41 µs per Byte Effective programming

time

System Voltage

— V

= 2.7 V to 3.6 V

— V

CCQ

= 2.7 V to 3.6 V

Packaging

— 56-Lead TSOP

— 64-Ball Easy BGA package

Security

— Enhanced security options for code

protection

— Absolute protection with V

PEN

= Vss

— Individual block locking

— Block erase/program lockout during power

transitions

— Password Access feature

— One-Time Programmable Register:

64 OTP bits, programmed with unique

information by Numonyx

64 OTP bits, available for customer

programming

Software

— Program and erase suspend support

— Numonyx

Flash Data Integrator (FDI)

— Common Flash Interface (CFI) Compatible

— Scalable Command Set

Quality and Reliability

— Operating temperature:

-40 °C to +85 °C

— 100K Minimum erase cycles per block

— 65 nm Flash Technology

— JESD47E Compliant

208032-04

Jan 2018

Micron Technology, Inc., reserves the right to change products or specifications without notice.

Numonyx

Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)

Contents

1.0

Introduction

.............................................................................................................. 6

1.1

Nomenclature ..................................................................................................... 6

1.2

Acronyms........................................................................................................... 7

1.3

Conventions ....................................................................................................... 7

Functional Overview

.................................................................................................. 9

2.1

Block Diagram .................................................................................................. 11

2.2

Memory Map..................................................................................................... 12

Package Information

............................................................................................... 13

3.1

56-Lead TSOP Package for 32-, 64-, 128-Mbit ....................................................... 13

3.2

64-Ball Easy BGA Package for 32-, 64-, 128-Mbit .................................................. 14

Ballouts/Pinouts and Signal Descriptions

................................................................ 16

4.1

Easy BGA Ballout for 32-, 64-, 128-Mbit ............................................................... 16

4.2

56-Lead TSOP Package Pinout for 32-, 64-,128-Mbit .............................................. 17

4.3

Signal Descriptions ............................................................................................ 18

Maximum Ratings and Operating Conditions............................................................

5.1

Absolute Maximum Ratings ................................................................................. 19

5.2

Operating Conditions ......................................................................................... 19

5.3

Power-Up/Down ................................................................................................ 19

5.3.1 Power-Up/Down Sequence....................................................................... 19

5.3.2 Power Supply Decoupling ........................................................................ 20

5.4

Reset............................................................................................................... 20

Electrical Characteristics

......................................................................................... 21

6.1

DC Current Specifications ................................................................................... 21

6.2

DC Voltage specifications.................................................................................... 22

6.3

Capacitance...................................................................................................... 22

AC Characteristics

................................................................................................... 23

7.1

Read Specifications............................................................................................ 24

7.2

Program, Erase, Block-Lock Specifications ............................................................ 28

7.3

Reset Specifications........................................................................................... 28

7.4

AC Test Conditions ............................................................................................ 29

Bus Interface...........................................................................................................

8.1

Bus Reads ........................................................................................................ 31

8.1.1 Asynchronous Page Mode Read ................................................................ 31

8.1.2 Output Disable....................................................................................... 32

8.2

Bus Writes........................................................................................................ 32

8.3

Standby ........................................................................................................... 33

8.3.1 Reset/Power-Down ................................................................................. 33

8.4

Device Commands............................................................................................. 33

Flash Operations

..................................................................................................... 34

9.1

Status Register ................................................................................................. 34

9.1.1 Clearing the Status Register .................................................................... 35

9.2

Read Operations ............................................................................................... 35

9.2.1 Read Array ............................................................................................ 35

9.2.2 Read Status Register .............................................................................. 36

9.2.3 Read Device Information ......................................................................... 36

9.2.4 CFI Query ............................................................................................. 36

9.3

Programming Operations.................................................................................... 36

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

Datasheet

Numonyx

Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)

9.4

9.5

9.6

9.7

9.8

9.3.1 Single-Word/Byte Programming................................................................36

9.3.2 Buffered Programming ............................................................................37

Block Erase Operations .......................................................................................38

Blank Check ......................................................................................................39

Suspend and Resume .........................................................................................39

Status Signal ....................................................................................................41

Security and Protection.......................................................................................42

9.8.1 Normal Block Locking ..............................................................................42

9.8.2 Configurable Block Locking.......................................................................43

9.8.3 Password Access.....................................................................................43

9.8.4 128-bit OTP Protection Register ................................................................43

9.8.5 Reading the 128-bit OTP Protection Register...............................................43

9.8.6 Programming the 128-bit OTP Protection Register .......................................43

9.8.7 Locking the 128-bit OTP Protection Register ...............................................44

9.8.8 VPEN Protection......................................................................................45

10.0 ID Codes

..................................................................................................................46

11.0 Device Command Codes

...........................................................................................47

12.0 Flow Charts..............................................................................................................48

13.0 Common Flash Interface

..........................................................................................57

13.1 Query Structure Output ......................................................................................57

13.2 Query Structure Overview...................................................................................58

13.3 Block Status Register .........................................................................................59

13.4 CFI Query Identification String ............................................................................59

13.5 System Interface Information..............................................................................60

13.6 Device Geometry Definition .................................................................................60

13.7 Primary-Vendor Specific Extended Query Table ......................................................61

Additional Information.............................................................................................64

Ordering Information...............................................................................................65

Datasheet

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