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DS1100LZ-150

Description
SILICON DELAY LINE, TRUE OUTPUT, PDSO8
Categorylogic    logic   
File Size156KB,6 Pages
ManufacturerDALLAS
Websitehttp://www.dalsemi.com
Download Datasheet Parametric View All

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DS1100LZ-150 Overview

SILICON DELAY LINE, TRUE OUTPUT, PDSO8

DS1100LZ-150 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerDALLAS
package instruction0.150 INCH, SOIC-8
Reach Compliance Codeunknown
JESD-30 codeR-PDSO-G8
JESD-609 codee0
Logic integrated circuit typeSILICON DELAY LINE
Number of functions1
Number of taps/steps5
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output impedance nominal value (Z0)50 Ω
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
power supply3.3 V
Maximum supply current (ICC)10 mA
programmable delay lineNO
Prop。Delay @ Nom-Sup150 ns
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Total delay nominal (td)150 ns
Base Number Matches1
PRELIMINARY
DS1100L
www.maxim-ic.com
3.3V 5-Tap Economy Timing
Element (Delay Line)
PIN ASSIGNMENT
IN
TAP 2
TAP 4
GND
1
2
3
4
8
7
6
5
V
CC
TAP 1
TAP 3
TAP 5
FEATURES
§
§
§
§
§
§
§
§
§
§
§
All-Silicon Timing Circuit
Five Taps Equally Spaced
Delays are Stable and Precise
Both Leading- and Trailing-Edge Accuracy
3.3V Version of the DS1100
Low-Power CMOS
TTL-/CMOS-compatible
Vapor-Phase and IR Solderable
Custom Delays Available
Fast-Turn Prototypes
Delays Specified Over Both Commercial and
Industrial Temperature Ranges
DS1100LZ SO (150mil)
DS1100LU µSOP
PIN DESCRIPTION
TAP 1 to TAP 5
V
CC
GND
IN
- TAP Output Number
- +3.3V
- Ground
- Input
DESCRIPTION
The DS1100L is a 3.3V version of the DS1100. It is characterized for operation over the range 3.0V to
3.6V. The DS1100L series delay lines have five equally spaced taps providing delays from 4ns to 500ns.
These devices are offered in surface-mount packages to save PC board area. Low cost and superior
reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and
industry-standard µSOP and SO packaging. The DS1100L 5-tap silicon delay line reproduces the input-
logic state at the output after a fixed delay as specified by the extension of the part number after the dash.
The DS1100L is designed to reproduce both leading and trailing edges with equal precision. Each tap is
capable of driving up to ten 74LS loads.
Dallas Semiconductor can customize standard products to meet special needs.
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