DATA SHEET
MOS FIELD EFFECT TRANSISTOR
3SK254
RF AMPLIFIER FOR CATV TUNER
N-CHANNEL Si DUAL GATE MOS FIELD-EFFECT TRANSISTOR
4 PINS SUPER MINI MOLD
FEATURES
• Low V
DD
Use
• Driving Battery
:
(V
DS
= 3.5 V)
NF1 = 2.0 dB TYP. (f = 470 MHz)
NF2 = 0.8 dB TYP. (f = 55 MHz)
• High Power Gain :
G
PS
= 19.0 dB TYP. (f = 470 MHz)
Embossed Type Taping
4 Pins Super Mini Mold
• Suitable for use as RF amplifier in CATV tuner.
2.0±0.2
1.25
PACKAGE DIMENSIONS
(Unit: mm)
2.1±0.2
0.3
+0.1
–0.05
0.3
+0.1
–0.05
3
4
0.15
+0.1
–0.05
0.3
+0.1
–0.05
(1.3)
0.4
+0.1
–0.05
1
0.9±0.1
0.3
• Low Noise Figure :
1.25±0.1
2
• Automatically Mounting :
• Small Package
:
ABSOLUTE MAXIMUM RATINGS (T
A
= 25
°
C)
Drain to Source Voltage
Gate1 to Source Voltage
Gate2 to Source Voltage
Gate1 to Drain Voltage
Gate2 to Drain Voltage
Drain Current
Total Power Dissipation
Channel Temperature
Storage Temperature
*1:
R
L
≥
10 kΩ
*2:
Free air
V
DSX
V
G1S
V
G2S
V
G1D
V
G2D
I
D
P
D
T
ch
T
stg
18
±8
*1
±8
*1
18
18
25
130
*2
125
–55 to +125
V
V
V
V
V
mA
mW
°C
°C
0.60
0.65
PIN CONNECTIONS
1.
2.
3.
4.
Source
Drain
Gate2
Gate1
PRECAUTION:
Avoid high static voltages or electric fields so that this device would not suffer from any damage due to those voltage
or fields.
The information in this document is subject to change without notice. Before using this document, please confirm that
this is the latest version.
Not all devices/types available in every country. Please check with local NEC Compound Semiconductor Devices
representative for availability and additional information.
Document No. PU10033EJ01V0DS (1st edition)
(Previous No. P10585EJ2V0DS00)
Date Published October 2001 CP(K)
Printed in Japan
The mark
shows major revised points.
NEC Corporation 1993
NEC Compound Semiconductor Devices 2001
0 to 0.1
3SK254
ELECTRICAL CHARACTERISTICS (T
A
= 25
°
C)
CHARACTERISTIC
Drain to Source Breakdown Voltage
Drain Current
Gate1 to Source Cutoff Voltage
Gate2 to Source Cutoff Voltage
Gate1 Reverse Current
Gate2 Reverse Current
Forward Transfer Admittance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Power Gain
Noise Figure 1
Noise Figure 2
SYMBOL
BV
DSX
I
DSX
V
G1S(off)
V
G2S(off)
I
G1SS
I
G2SS
|y
fs
|
C
iss
C
oss
C
rss
G
ps
NF1
NF2
16
14
2.4
0.9
18
2.9
1.2
0.01
19
2.0
0.8
MIN.
18
0.1
–1.0
0
0
0.5
5.0
+1.0
1.0
±20
±20
23
3.4
1.5
0.03
22
3.0
2.3
TYP.
MAX.
UNIT
V
mA
V
V
nA
nA
mS
pF
pF
pF
dB
dB
dB
V
DS
= 3.5 V, V
G2S
= 3 V, I
D
= 7 mA
f = 470 MHz
V
DS
= 3.5 V, V
G2S
= 3 V, I
D
= 7 mA
f = 55 MHz
V
DS
= 3.5 V, V
G2S
= 3 V, I
D
= 7 mA
f = 1 MHz
TEST CONDITIONS
V
G1S
= V
G2S
= –2 V, I
D
= 10
µ
A
V
DS
= 3.5 V, V
G2S
= 3 V, V
G1S
= 0.5 V
V
DS
= 3.5 V, V
G2S
= 3 V, I
D
= 10
µ
A
V
DS
= 3.5 V, V
G1S
= 3 V, I
D
= 10
µ
A
V
DS
= 0, V
G2S
= 0, V
G1S
=
±6
V
V
DS
= 0, V
G1S
= 0, V
G2S
=
±6
V
V
DS
= 3.5 V, V
G2S
= 3 V, I
D
= 7 mA
f = 1 kHz
I
DSX
Classification
Rank
Marking
I
DSX
(mA)
U1E
U1E
0.1 to 5.0
2
Data Sheet PU10033EJ01V0DS
3SK254
TYPICAL CHARACTERISTICS (T
A
= 25 ˚C)
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
25
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
G2S
= 3 V
V
G1S
= 1.6 V
P
D
– Total Power Dissipation – mW
I
D
– Drain Current – mA
200
20
1.4 V
15
1.2 V
1.0 V
0.8 V
5
0.6 V
130 mW
100
10
0
25
50
75
100
125
0
5
V
DS
– Drain to Source Voltage – V
FORWARD TRANSFER ADMITTANCE vs.
GATE1 TO SOURCE VOLTAGE
10
T
a
– Ambient Temperature – °C
DRAIN CURRENT vs.
GATE1 TO SOURCE VOLTAGE
V
DS
= 3.5 V
V
G2S
= 3.5 V
3.0 V
2.5 V
2.0 V
15
|y
fs
| – Forward Transfer Admittance – mS
25
40
V
DS
= 3.5 V
f = 1 kHz
32
V
G2S
= 3.5 V
I
D
– Drain Current – mA
20
24
10
1.5 V
16
2.0 V
8
1.0 V
0
0.5
1.0
1.5 V
1.5
3.0 V
2.5 V
5
1.0 V
0.5
1.0
1.5
2.0
2.5
0
2.0
2.5
V
G1S
– Gate1 to Source Voltage – V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
V
G1S
– Gate1 to Source Voltage – V
INPUT CAPACITANCE vs.
GATE2 TO SOURCE VOLTAGE
5.0
I
D
= 7 mA
(at V
DS
= 3.5 V,
V
G2S
= 3 V)
f = 1 MHz
|y
fs
| – Forward Transfer Admittance – mS
40
C
iss
– Input Capacitance – pF
V
DS
= 3.5 V
f = 1 kHz
32
V
G2S
= 3.5 V
3.0 V
16
2.5 V
4.0
24
3.0
2.0
8
1.0 V
0
4
1.5 V
8
12
2.0 V
16
20
1.0
0
–1.0
0
1.0
2.0
3.0
4.0
I
D
– Drain Current – mA
V
G2S
– Gate2 to Source Voltage – V
Data Sheet PU10033EJ01V0DS
3
3SK254
OUTPUT CAPACITANCE vs.
GATE2 TO SOURCE VOLTAGE
2.5
10
I
D
= 7 mA
(at V
DS
= 3.5 V,
V
G2S
= 3.0 V)
f = 1 MHz
20
I
D
= 7 mA
(at V
DS
= 3.5 V,
V
G2S
= 3.0 V)
f = 470 MHz
G
PS
POWER GAIN AND NOISE FIGURE vs.
GATE2 TO SOURCE VOLTAGE
C
oss
– Output Capacitance – pF
NF – Noise Figure – dB
G
PS
– Power Gain – dB
2.0
10
1.5
5
0
1.0
–10
NF
–20
0.5
0
–1.0
0
1.0
2.0
3.0
4.0
0
–1.0
0
1.0
2.0
3.0
4.0
V
G2S
– Gate2 to Source Voltage – V
V
G2S
– Gate2 to Source Voltage – V
4
Data Sheet PU10033EJ01V0DS
3SK254
G
PS
AND NF TEST CIRCUIT AT f = 470 MHz
V
G2S
1 000 pF
22 kΩ
1 000 pF
Ferrite Beads
L
2
L
1
1 000 pF
22 kΩ
L
3
1 000 pF
1 000 pF
15 pF
15 pF
1 000 pF
40 pF OUTPUT
50
Ω
INPUT 40 pF
50
Ω
V
G1S
V
DS
L
1
:
φ
1.2 mm U.E.W
φ
5 mm 1T
L
2
:
φ
1.2 mm U.E.W
φ
5 mm 1T
L
3
: REC 2.2
µ
H
NF TEST CIRCUIT AT f = 55 MHz
V
G2S
V
DS
RFC
2.2 kΩ
1 500 pF
1 000 pF
INPUT
50
Ω
3.3
kΩ
27 pF
47
kΩ
47 kΩ
1 000 pF
27 pF
OUTPUT
3.3 kΩ
50
Ω
Ferrite Beads
1 500 pF
V
G1S
Data Sheet PU10033EJ01V0DS
5
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