DS1990A
Serial Number iButton
TM
www.dalsemi.com
DS1990A SPECIAL FEATURES
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Upgrade of DS1990 allows multiple Serial
Number iButtons to reside on a common bus
Unique 48–bit serial number
Low-cost electronic key for access control
8-bit CRC for checking data integrity
Can be read in less than 5 ms
Operating temperature range of -40°C to
+85°C
Unique, factory-lasered and tested 64-bit
registration number (8-bit family code + 48-
bit serial number + 8-bit CRC tester) assures
absolute traceability because no two parts are
alike
Multidrop controller for MicroLAN
Digital identification by momentary contact
Chip-based data carrier compactly stores
information
Data can be accessed while affixed to an
object
Economically communicates to bus master
with a single digital signal at 16.3k bits per
second
Standard 16 mm diameter and 1-Wire
TM
protocol ensure compatibility with iButton
family
Button shape is self-aligning with cup-
shaped probes
Durable stainless steel case engraved with
registration number withstands harsh
environments
Easily affixed with self-stick adhesive
backing, latched by its flange, or locked with
a ring pressed onto its rim
Presence detector acknowledges when reader
first applies voltage
Meets UL#913 (4th Edit.); Intrinsically Safe
Apparatus, Approved under Entity Concept
for use in Class 1, Division 1, Group A, B, C
and D locations
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F3 MICROCAN
TM
3.10
0.36
0.51
c
1993
16.25
YYWW REGISTERED RR
66
01
17.35
000000FBC52B
DATA
COMMON iButton FEATURES
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GROUND
F5 MICROCAN
TM
5.89
0.36
0.51
c
1993
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16.25
YYWW REGISTERED RR
E6
01
17.35
000000FBD8B3
DATA
GROUND
All dimensions shown in millimeters
ORDERING INFORMATION
DS1990A-F3
DS1990A-F5
DS9096P
DS9101
DS9093RA
DS9093F
DS9092
F3 MicroCan
F5 MicroCan
Self-Stick Adhesive Pad
Multi-Purpose Clip
Mounting Lock Ring
Snap-In Fob
iButton Probe
EXAMPLES OF ACCESSORIES
081999
DS1990A
iButton DESCRIPTION
The DS1990A Serial Number iButton is a rugged data carrier that acts as an electronic registration
number for automatic identification. The DS1990A consists of a factory-lasered, 64-bit ROM that
includes an unique 48-bit serial number, an 8-bit CRC and an 8-bit Family Code (01h). Data is transferred
serially via the 1-Wire protocol which requires only a single data lead and a ground return. The DS1990A
is fully compatible with the DS1990 Serial Number iButton but provides the additional 1-Wire protocol
capability that allows the Search ROM command to be interpreted by the DS1990A and therefore allows
multiple DS1990A devices to reside on a single data line.
The durable MicroCan package is highly resistant to environmental hazards such as dirt, moisture and
shock. Its compact coin-shaped profile is self-aligning with mating receptacles, allowing the DS1990A to
be used easily by human operators. Accessories permit the DS1990A to be mounted on plastic key tabs,
photo ID badges, printed circuit boards or any smooth surface of an object. Applications include access
control, work-in-progress tracking, tool management and inventory control.
OPERATION
The DS1990A’s internal ROM is accessed via a single data line. The 48-bit serial number, 8-bit family
code and 8-bit CRC are retrieved using the Dallas 1-Wire protocol. This protocol defines bus transactions
in terms of the bus state during specified time slots that are initiated on the falling edge of sync pulses
from the bus master. All data is read and written least significant bit first.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system which has a single bus master system and one or more slaves. In all instances,
the DS1990A is a slave device. The bus master is typically a microcontroller. The discussion of this bus
system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire
signaling (signal type and timing). For a more detailed protocol description, refer to Chapter 4 of the
Book of DS19xx iButton Standards.
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have an
open drain connection or 3-state outputs. The DS1990A is an open drain part with an internal circuit
equivalent to that shown in Figure 2. The bus master can be the same equivalent circuit. If a bidirectional
pin is not available, separate output and input pins can be tied together. The bus master requires a pullup
resistor at the master end of the bus, with the bus master circuit equivalent to the one shown in Figure 3.
The value of the pullup resistor should be approximately 5 kΩ for short line lengths. A multidrop bus
consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus has a maximum data rate of 16.3k
bits per second.
The idle state for the 1-Wire bus is high. If, for any reason, a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 120
µs,
one or more of the devices on the bus may be reset.
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DS1990A
DS1990A MEMORY MAP
Figure 1
8-Bit CRC Code
MSB
LSB MSB
48-Bit Serial Number
8-Bit Family Code (01h)
LSB MSB
LSB
DS1990A EQUIVALENT CIRCUIT
Figure 2
BUS MASTER CIRCUIT
Figure 3
To data connection of DS1990A
To data connection
of DS1990A
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DS1990A
TRANSACTION SEQUENCE
The sequence for accessing the DS1990A via the 1-Wire port is as follows:
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Initialization
ROM Function Command
Read Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the
slave(s).
The presence pulse lets the bus master know that the DS1990A is on the bus and is ready to operate. For
more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the four ROM function commands. All
ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in
Figure 4):
Read ROM [33h] or [0Fh]
This command allows the bus master to read the DS1990A’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command can only be used if there is a single DS1990A on the bus. If more
than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same
time (open drain will produce a wired-AND result). The DS1990A Read ROM function will occur with a
command byte of either 33h or 0Fh in order to ensure compatibility with the DS1990, which will only
respond to a 0Fh command word with its 64-bit ROM data.
Match ROM [55h] / Skip ROM [CCh]
The complete 1-Wire protocol for all Dallas Semiconductor iButtons contains a Match ROM and a Skip
ROM command. (See the Book of DS19xx iButton Standards.) Since the DS1990A contains only the 64-
bit ROM with no additional data fields, the Match ROM and Skip ROM are not applicable and will cause
no further activity on the 1-Wire bus if executed. The DS1990A does not interfere with other 1-Wire parts
on a multidrop bus that do respond to a Match ROM or Skip ROM (example DS1990A and DS1994 on
the same bus).
Search ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-
Wire bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process
of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The ROM search process
is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the
desired value of that bit. The bus master performs this simple 3-step routine on each bit of the ROM.
After one complete pass, the bus master knows the contents of the ROM in one device. The remaining
number of devices and their ROM codes may be identified by additional passes. See Chapter 5 of the
Book of DS19xx iButton Standards for a comprehensive discussion of a ROM search, including an actual
example.
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DS1990A
ROM FUNCTIONS FLOW CHART
Figure 4
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